EP20K100EFC324-1N vs EP20K100FC324-3 比較
詳細な並列比較: EP20K100EFC324-1N メーカー: Altera および EP20K100FC324-3 メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP20K100EFC324-1N | EP20K100FC324-3 |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $108.00 | $42.10 |
| Family | APEX-20KE | APEX 20K (non-KE) |
| Device Type | FPGA (Field Programmable Gate Array) | — |
| Logic Elements (LEs) | 4160 | — |
| Typical Gates | 100,000 | — |
| Maximum User I/O | 246 | — |
| Embedded System Blocks (ESBs) | 53248 bits | — |
| パッケージ | 324-BGA (FineLine BGA) | 324-pin FBGA (Fine-pitch BGA) |
| 動作温度 | 0 C to 85 C | 0 °C to 85 °C (Commercial) |
| Propagation Delay | 1.6 ns | 1.6 ns |
| Internal Operating Frequency | 250 MHz | — |
| Core Voltage | 1.8 V | — |
| I/O Standard Support | LVDS, SSTL, HSTL, LVTTL, LVCMOS | — |
| Process Technology | 0.15 µm all-layer copper CMOS | 0.22 µm CMOS |
| JTAG Support | IEEE 1149.1 boundary-scan | — |
| Programming Technology | SRAM-based (volatile, requires configuration device) | — |
| MultiVolt I/O | 1.8 V core with 3.3 V / 5.0 V I/O support | — |
| Series | — | APEX 20K |
| System Gates | — | 100,000 |
| Logic Elements | — | 4,160 |
| Maximum Logic Blocks | — | 26 |
| Embedded Memory (RAM bits) | — | 53,248 |
| User I/O Pins | — | 252 |
| Total RAM bits | — | 53,248 |
| Core Supply Voltage | — | 2.5 V |
| Maximum Internal Frequency | — | 167 MHz |
| Speed Grade | — | -3 (slowest) |
| Package Body Size | — | 45 x 45 mm |
| Ball Pitch | — | 1.27 mm |
| Programming Interface | — | IEEE 1149.1 JTAG |
| 実装タイプ | — | Surface Mount |
| RoHS ステータス | — | [DATA_NEEDED: RoHS status] |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |