EP20K100FC196-1X vs EP20K100FC196-2X 比較
詳細な並列比較: EP20K100FC196-1X メーカー: Altera および EP20K100FC196-2X メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Altera
EP20K100FC196-1X - 100K-Gate APEX-20K FPGA, 196-BGA | Altera/Intel
EP20K100FC196-1X ⚠ ラストタイムバイ仕様比較
| パラメータ | EP20K100FC196-1X | EP20K100FC196-2X |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | ラストバイ | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $96.40 | $0.00 |
| Family | APEX 20K | APEX 20K |
| Typical Gates | 100,000 | — |
| Logic Elements | [DATA_NEEDED: exact logic element count] | — |
| Embedded Array Blocks (EABs) | [DATA_NEEDED: EAB count] | — |
| Maximum User I/O Pins | [DATA_NEEDED: max user I/O] | — |
| Maximum User Memory Bits | [DATA_NEEDED: max RAM bits] | — |
| パッケージ | 196-ball FineLine BGA | — |
| Speed Grade | -1 (slowest in APEX 20K family) | -2X |
| Process Technology | 0.18-micron CMOS, SRAM-based | — |
| Supply Voltage - Core | 1.8 V | — |
| I/O Standards | 1.8V / 2.5V / 3.3V LVTTL/LVCMOS, PCI | — |
| Configuration Interface | Passive Serial, JTAG (IEEE 1149.1) | — |
| 動作温度 | -40C to +85C (industrial) | — |
| RoHS ステータス | unknown | unknown |
| MSLレベル | 3 (per JEDEC J-STD-020) | — |
| Product Category | — | FPGA - Field Programmable Gate Array |
| Manufacturer | — | Intel (formerly Altera) |
| Number of Logic Elements | — | 4160 logic elements |
| Package Type | — | FineLine BGA |
| Package Balls | — | 196 |
| 実装タイプ | — | Surface Mount |
| Typical Gate Count | — | [DATA_NEEDED: typical gate count] |
| Number of User I/O | — | [DATA_NEEDED: user I/O count for FC196 package] |
| Embedded RAM Bits | — | [DATA_NEEDED: embedded RAM bits] |
| Core Supply Voltage | — | [DATA_NEEDED: core supply voltage] |
| I/O Supply Voltage | — | [DATA_NEEDED: I/O supply voltage] |
| Maximum fMAX | — | [DATA_NEEDED: maximum clock frequency for -2X speed grade] |
| 動作温度範囲 | — | [DATA_NEEDED: operating temperature grade] |
| Moisture Sensitivity Level | — | [DATA_NEEDED: MSL] |