EP20K100QC208-2 vs EP20K100QC208-1N 比較
詳細な並列比較: EP20K100QC208-2 メーカー: Altera および EP20K100QC208-1N メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP20K100QC208-2 | EP20K100QC208-1N |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | NRND | NRND |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $29.90 | $51.00 |
| Manufacturer | Altera | — |
| Product Series | APEX-20K | — |
| Device Type | Field Programmable Gate Array (FPGA) | — |
| Logic Elements / Cells | 4160 | — |
| Number of LABs / CLBs | 416 | — |
| Total RAM Bits | 53248 | — |
| Number of User I/Os | 159 | — |
| Number of Gates | 263000 | — |
| パッケージ / ケース | 208-BFQFP (208-PQFP 28x28) | — |
| Terminal Form | Gull wing | — |
| Number of Terminals | 208 | — |
| 実装タイプ | Surface Mount | — |
| 動作温度 | 0°C to 85°C (TJ) | 0 °C to +85 °C (commercial) |
| Supply Voltage (VCC) | 1.71 V ~ 1.89 V (per one distributor listing; verify against APEX-20K datasheet) | — |
| I/O Standard Support | [DATA_NEEDED: I/O standard support] | — |
| Maximum Propagation Delay (-2 speed grade) | [DATA_NEEDED: max tPD for -2 speed grade] | — |
| Configuration Technology | [DATA_NEEDED: configuration technology details] | — |
| MSLレベル | [DATA_NEEDED: MSL level] | — |
| RoHS ステータス | unknown | — |
| Product Lifecycle | NRND / legacy source through Rochester Electronics | — |
| Family | — | APEX 20K |
| Typical Gates | — | 100,000 |
| Logic Elements | — | 4,160 |
| Embedded System Blocks (ESBs) | — | 26 |
| Maximum User I/Os | — | 159 |
| Dedicated Inputs | — | 4 |
| パッケージ | — | PQFP-208 (0.5 mm pitch) |
| Process Technology | — | 0.22 µm CMOS |
| Core Voltage (VCCINT) | — | 2.5 V |
| I/O Voltage (VCCIO) | — | 2.5 V / 3.3 V / 5 V (multi-voltage) |
| Propagation Delay | — | 1.6 ns |
| Maximum Internal Frequency | — | 250 MHz |
| Programming Interface | — | IEEE 1149.1 (JTAG) ISP |
| Supply Voltage Range | — | 2.375 V to 2.625 V |
| Speed Grade | — | -1 |