EP20K100QC240-1 vs EP20K100CQ240C7 比較
詳細な並列比較: EP20K100QC240-1 メーカー: Intel および EP20K100CQ240C7 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP20K100QC240-1 | EP20K100CQ240C7 |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $98.00 | $92.00 |
| Family | APEX 20K | APEX-20K |
| Device Type | FPGA (Field-Programmable Gate Array) | FPGA (Field Programmable Gate Array) |
| Logic Elements (LEs) | 4,160 | — |
| Typical Gates | 100,000 | — |
| Maximum User I/O | 189 | — |
| Embedded RAM Bits | 53,248 | — |
| Process Technology | 0.22 µm CMOS | — |
| Core Supply Voltage | 2.5 V | — |
| Maximum Internal Frequency | 250 MHz | — |
| Speed Grade | -1 | C7 |
| パッケージ | 240-pin PQFP (QFP-240) | — |
| Package Code | S-PQFP-G240 | — |
| Terminal Form | Gull Wing | — |
| Propagation Delay | 1.6 ns (per datasheet, typical) | — |
| 動作温度 | 0 °C to +85 °C (Commercial) | 0C to +85C (commercial) |
| 実装タイプ | Surface Mount | Surface Mount |
| JTAG Support | IEEE 1149.1 Boundary Scan | — |
| Programming | In-system (SRAM-based) via Quartus / MAX+PLUS II | — |
| System Gates | — | 100,000 |
| Logic Elements | — | 53,248 |
| Embedded Memory Bits | — | 4,160 |
| Maximum User I/O Pins | — | 189 |
| Package Type | — | 240-BFQFP |
| Supply Voltage - Core | — | [DATA_NEEDED: core voltage] |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, GTL (per family datasheet) |
| Number of PLLs | — | 4 (per APEX-20K family datasheet) |
| Embedded System Blocks (ESBs) | — | Yes (per APEX-20K family) |
| RoHS ステータス | — | unknown |
| Lead-Free | — | unknown |
| MSLレベル | — | [DATA_NEEDED: MSL rating] |
| Programming Tool | — | Altera Quartus / MAX+PLUS II (per family) |