EP20K100QC240-1 vs EP20K100QC240-3 比較
詳細な並列比較: EP20K100QC240-1 メーカー: Intel および EP20K100QC240-3 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP20K100QC240-1 | EP20K100QC240-3 |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | 有効 |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $98.00 | $24.50 |
| Family | APEX 20K | — |
| Device Type | FPGA (Field-Programmable Gate Array) | — |
| Logic Elements (LEs) | 4,160 | — |
| Typical Gates | 100,000 | — |
| Maximum User I/O | 189 | — |
| Embedded RAM Bits | 53,248 | — |
| Process Technology | 0.22 µm CMOS | — |
| Core Supply Voltage | 2.5 V | 2.5 V |
| Maximum Internal Frequency | 250 MHz | — |
| Speed Grade | -1 | -3 |
| パッケージ | 240-pin PQFP (QFP-240) | — |
| Package Code | S-PQFP-G240 | — |
| Terminal Form | Gull Wing | — |
| Propagation Delay | 1.6 ns (per datasheet, typical) | [DATA_NEEDED: propagation delay timing table] |
| 動作温度 | 0 °C to +85 °C (Commercial) | — |
| 実装タイプ | Surface Mount | Surface Mount |
| JTAG Support | IEEE 1149.1 Boundary Scan | — |
| Programming | In-system (SRAM-based) via Quartus / MAX+PLUS II | — |
| Manufacturer | — | Altera |
| FPGA Family | — | APEX-20K |
| Number of Logic Elements | — | 4160 cells |
| Total RAM Bits | — | 53248 bits |
| Number of User I/O | — | 189 |
| Typical Gate Count | — | 263000 gates |
| 最大クロック周波数 | — | 167 MHz (family rating) |
| Technology Process | — | 0.22 um |
| Package Type | — | 240-BFQFP |
| ピン数 | — | 240 |
| 動作温度範囲 | — | 0 °C to +85 °C (commercial) |
| Supported I/O Standards | — | [DATA_NEEDED: supported I/O standards] |
| Configuration / JTAG Interface | — | [DATA_NEEDED: configuration and JTAG interface details] |
| RoHS Compliance | — | [DATA_NEEDED: RoHS compliance for non-N version] |