EP20K100QC240-1XV vs EP20K100QC240-3 比較
詳細な並列比較: EP20K100QC240-1XV メーカー: Intel および EP20K100QC240-3 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Intel
EP20K100QC240-1XV - APEX 20K 100K-Gate FPGA, 240-PQFP | Intel / Altera
EP20K100QC240-1XV Obsolete仕様比較
| パラメータ | EP20K100QC240-1XV | EP20K100QC240-3 |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | 有効 |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $52.10 | $24.50 |
| Series | APEX 20K | — |
| Device Family | APEX 20K (MultiCore architecture) | — |
| System Gates | 100,000 gates | — |
| Logic Elements (Cells) | 4,160 | — |
| Embedded Memory | 53,248 bits | — |
| User I/Os | 189 | — |
| Dedicated Inputs | 4 | — |
| PLLs | 4 | — |
| Core Supply Voltage (VCCINT) | 2.5 V nominal (2.375 V to 2.625 V) | — |
| I/O Supply Voltage (VCCIO) | 3.3 V / 5 V tolerant | — |
| Propagation Delay (tpd) | 2.5 ns | — |
| Maximum Internal Frequency | 250 MHz | — |
| Process Technology | 0.22 um CMOS | — |
| パッケージ | 240-pin PQFP (32 x 32 mm, 0.5 mm pitch) | — |
| 実装タイプ | Surface Mount (gull-wing leads) | Surface Mount |
| 動作温度 | 0C to +85C (commercial) / -40C to +85C (industrial variant) | — |
| Configuration Interface | JTAG / serial (EPC configuration device) | — |
| RoHS ステータス | Non-compliant (legacy PQFP, non-LEAD-FREE process) | — |
| ライフサイクル状態 | Obsolete / last-time-buy per Altera PCN | — |
| Manufacturer | — | Altera |
| FPGA Family | — | APEX-20K |
| Number of Logic Elements | — | 4160 cells |
| Total RAM Bits | — | 53248 bits |
| Number of User I/O | — | 189 |
| Typical Gate Count | — | 263000 gates |
| Core Supply Voltage | — | 2.5 V |
| 最大クロック周波数 | — | 167 MHz (family rating) |
| Speed Grade | — | -3 |
| Technology Process | — | 0.22 um |
| Package Type | — | 240-BFQFP |
| ピン数 | — | 240 |
| 動作温度範囲 | — | 0 °C to +85 °C (commercial) |
| Propagation Delay | — | [DATA_NEEDED: propagation delay timing table] |
| Supported I/O Standards | — | [DATA_NEEDED: supported I/O standards] |
| Configuration / JTAG Interface | — | [DATA_NEEDED: configuration and JTAG interface details] |
| RoHS Compliance | — | [DATA_NEEDED: RoHS compliance for non-N version] |