EP20K200CB356C8N vs EP20K200BC356-2 比較
詳細な並列比較: EP20K200CB356C8N メーカー: Altera および EP20K200BC356-2 メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP20K200CB356C8N | EP20K200BC356-2 |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $56.40 | $88.25 |
| Family | APEX 20KC | — |
| Series | EP20K200 | APEX-20K |
| Device Type | SRAM-based LUT FPGA | — |
| System Gates | 200,000 | — |
| Logic Elements (Cells) | 8,320 | — |
| Maximum Internal Frequency | 301.21 MHz | — |
| Process Technology | 0.15 um CMOS | 0.22 µm |
| Propagation Delay (tpd) | 1.78 ns | — |
| Nominal Core Supply Voltage | 1.8 V | — |
| Core Supply Voltage Range | 1.71 V to 1.89 V | — |
| Number of User I/O Pins | 263 | — |
| Number of Dedicated Inputs | 4 | — |
| Total Macrocells / Output Functions | 263 | — |
| Embedded Memory Bits | 106,496 bits | — |
| Number of PLLs | 4 | — |
| MultiVolt I/O Support | 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| Differential Signaling | LVDS | — |
| Configuration Interface | Serial / JTAG (IEEE 1149.1) | — |
| パッケージ | 356-ball LBGA | 356-LBGA (35 mm × 35 mm) |
| Operating Temperature (commercial "C") | 0 C to +85 C (TJ) | — |
| Terminal Finish ("N") | Lead-free / Pb-free | — |
| RoHS ステータス | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS compliance] |
| 湿気感度レベル（MSL） | [DATA_NEEDED: MSL rating] | — |
| Device Family | — | APEX-20K (MultiCore PLD) |
| Logic Elements | — | 8,320 |
| Typical Gate Count | — | 200,000 gates |
| Embedded Memory | — | 106,496 bits |
| User I/Os | — | 277 |
| Logic Family | — | CMOS |
| Propagation Delay | — | 2.5 ns |
| Core Supply Voltage | — | 2.5 V |
| 動作温度 | — | 0 °C to +85 °C (commercial) |
| Speed Grade | — | -2 |
| 実装タイプ | — | Surface Mount (BGA) |
| Maximum Frequency | — | 200 MHz |