EP20K200CB652C7ES vs EP20K1000CB652C8ES 比較
詳細な並列比較: EP20K200CB652C7ES メーカー: Altera および EP20K1000CB652C8ES メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP20K200CB652C7ES | EP20K1000CB652C8ES |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | ラストバイ | ラストバイ |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $275.00 | $220.00 |
| Family | APEX 20K | APEX 20KC |
| Logic Elements | 8,320 | 38,400 |
| Embedded System Block (ESB) RAM | 106,496 bits | — |
| Maximum User I/O Pins | [DATA_NEEDED: maximum user I/O count for 652-BGA] | — |
| Core Voltage (VCCINT) | 1.8 V | — |
| I/O Voltage (VCCIO) | 1.8 V / 2.5 V / 3.3 V / 5.0 V (MultiVolt) | — |
| Speed Grade | -7 | — |
| Operating Temperature (Commercial) | 0 °C to +85 °C | — |
| パッケージ | 652-BGA | 652-BGA (FCBGA, 45 x 45 mm, 1.27 mm pitch) |
| 実装タイプ | Surface Mount | — |
| Configuration Method | SRAM (volatile, requires external PROM on power-up) | — |
| PLL Count | Up to 8 | — |
| Supported I/O Standards | LVTTL, LVCMOS, PCI, GTL+, SSTL, LVDS | — |
| JTAG (IEEE 1149.1) | Yes (boundary-scan) | — |
| Configuration Device Compatibility | EPC2, EPC8, EPC16, EPC64, microprocessor | — |
| RoHS ステータス | [DATA_NEEDED: RoHS compliance status] | — |
| MSLレベル | [DATA_NEEDED: moisture sensitivity level] | — |
| Manufacturer | — | Intel (formerly Altera) |
| Device Type | — | FPGA (Field Programmable Gate Array) |
| System Gates | — | 1,000,000 (1M) |
| Embedded Memory (RAM bits) | — | 327,680 (plus 1,521,600 including parity) |
| Embedded System Blocks (ESBs) | — | 88 |
| User I/Os | — | 488 |
| PLLs | — | 4 |
| DLLs / LVDS Channels | — | 4 LVDS |
| Core Voltage | — | 1.8 V |
| Process Technology | — | 0.15 µm all-layer copper |
| Max Internal Frequency | — | 301.21 MHz |
| Propagation Delay | — | 1.6 ns |
| 動作温度 | — | 0 °C to 85 °C (Commercial, C8 speed grade) |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, GTL+, SSTL-2/3, HSTL, LVDS, LVPECL |