EP20K200CQ240C8ES vs EP20K100CQ240C8ES 比較
詳細な並列比較: EP20K200CQ240C8ES メーカー: Altera および EP20K100CQ240C8ES メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Altera
EP20K200CQ240C8ES - 200K APEX 20KC FPGA, 240-PQFP | Altera (Intel PSG)
EP20K200CQ240C8ES Obsolete仕様比較
| パラメータ | EP20K200CQ240C8ES | EP20K100CQ240C8ES |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $95.00 | $39.60 |
| Family | APEX 20KC | — |
| Device Logic Elements | 8,320 cells | — |
| Typical Gates | 200,000 | — |
| Embedded Memory | 106,496 bits | — |
| User I/O Count | 168 | — |
| Maximum Internal Clock Frequency | 301.21 MHz | — |
| Core Voltage | 1.8 V | — |
| Process Technology | 0.15 µm CMOS | — |
| パッケージ | 240-BFQFP (PQFP) | — |
| ピン数 | 240 | — |
| 動作温度 | [DATA_NEEDED: Operating temperature range] | — |
| Speed Grade | C8 | — |
| Device Variant Suffix | ES (engineering sample) | — |
| PLLs | 4 | — |
| 実装タイプ | Surface Mount | Surface Mount |
| RoHS ステータス | [DATA_NEEDED: RoHS compliance] | Unknown - not confirmed in scraped listing |
| MSLレベル | [DATA_NEEDED: MSL rating] | — |
| Device Type | — | FPGA (Field Programmable Gate Array) |
| Product Family | — | Intel/Altera EP20K series FPGA family |
| Number of Logic Elements / Cells | — | 4,160 |
| Total RAM Bits | — | 53,248 bits |
| Number of User I/O | — | 189 |
| パッケージ / ケース | — | 240-BFQFP / QFP-240 |
| Package Type | — | Quad Flat Package |
| Packaging | — | Tray |
| Ordering/ Speed Grade Suffix | — | C8ES |
| Stock Quantity | — | 4,816 pieces per Heisener listing |
| Lead Time | — | To Be Confirmed |
| Unit Price | — | Request a Quote |
| Minimum Operating Temperature | — | [DATA_NEEDED: minimum operating temperature] |
| Maximum Operating Temperature | — | [DATA_NEEDED: maximum operating temperature] |
| Core / I/O Supply Voltage | — | [DATA_NEEDED: VCCINT and VCCIO voltage] |
| Supported I/O Standards | — | [DATA_NEEDED: supported I/O standards] |
| Differential I/O Pairs | — | [DATA_NEEDED: number of differential I/O pairs] |
| Configuration Schemes | — | [DATA_NEEDED: supported configuration schemes] |