EP20K200EBC652-3N vs EP20K200EBC652-3 比較
詳細な並列比較: EP20K200EBC652-3N メーカー: Altera および EP20K200EBC652-3 メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP20K200EBC652-3N | EP20K200EBC652-3 |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $220.00 | $210.00 |
| Series | APEX 20KE (APEX-20KE®) | — |
| Device Family | EP20K200 | — |
| System Gates | 200,000 | — |
| Logic Elements / Cells | 8,320 | — |
| Logic Array Blocks (LABs) | 832 | 832 |
| Macrocells | 832 | — |
| Embedded RAM | 106,496 bits | — |
| User I/Os (DigiKey listing) | 376 | — |
| User I/Os (digchip listing) | 277 | — |
| Propagation Delay | 2.33 ns | — |
| Internal Frequency (max) | 189 MHz | — |
| Process Technology | 0.22 µm CMOS | — |
| Core Supply Voltage | 1.71 V to 1.89 V (nominal 1.8 V) | — |
| I/O Supply (LVDS-capable) | LVDS, 2.5 V referenced (per source variant) | — |
| パッケージ | 652-ball BGA | 652-ball FineLine BGA (top-side, 1.27 mm pitch) |
| 実装タイプ | Surface Mount | Surface Mount |
| Operating Temperature (TJ) | 0 °C to 85 °C (commercial) | — |
| Speed Grade | -3 (slowest in APEX 20KE family) | -3 |
| Configuration | JTAG (IEEE 1149.1), Passive Serial | — |
| RoHS ステータス | Compliant | Not RoHS (non-lead-free variant) |
| Family | — | APEX-20KE |
| Logic Elements (LEs) | — | 8,320 |
| Total RAM Bits | — | 106,496 |
| Maximum User I/O Pins | — | 376 |
| Embedded System Blocks (ESBs) | — | Yes (dual-port RAM / ROM / CAM) |
| PLLs | — | 4 |
| 動作温度 | — | 0C to +85C (EBC - Enhanced Commercial) |
| Configuration Mode | — | JTAG / PS / Passive-serial / Passive-parallel |
| Process Node | — | [DATA_NEEDED: process node] |
| Core Voltage | — | [DATA_NEEDED: core voltage] |
| ライフサイクル状態 | — | Obsolete - last time-buy period closed |