EP20K200FC484-1 vs EP20K200FC484-1XV 比較
詳細な並列比較: EP20K200FC484-1 メーカー: Altera および EP20K200FC484-1XV メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP20K200FC484-1 | EP20K200FC484-1XV |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $119.00 | $19.95 |
| Family | APEX 20K | APEX 20K |
| Logic Elements / Cells | 8320 | — |
| System Gates | 200 K | — |
| Embedded Memory (RAM bits) | 106,496 bits | — |
| Number of I/Os | 382 | — |
| Number of LABs/CLBs | [DATA_NEEDED: LAB count] | — |
| Core Supply Voltage | 2.5 V | — |
| Process Technology | 0.22 µm CMOS | 0.22 µm CMOS |
| Maximum Operating Frequency | 250 MHz | — |
| Propagation Delay | 2.5 ns | — |
| 動作温度 | 0 °C to 85 °C (Commercial) | Industrial / military (per variant) |
| パッケージ | 484-ball FBGA (FineLine BGA) | 484-FBGA (FC484), 23 mm x 23 mm, 1.27 mm pitch |
| 実装タイプ | Surface Mount | — |
| Architecture | MultiCore (LUT + Embedded System Blocks) | — |
| Programming Interface | IEEE 1149.1 JTAG | — |
| Speed Grade | -1 (fastest bin) | -1 (with XV extended/reprocurement suffix) |
| RoHS ステータス | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: exact RoHS statement] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Series | — | APEX-20K® |
| Device Type | — | Field Programmable Gate Array (FPGA) |
| Maximum System Gates | — | 200,000 (typical) |
| Maximum Logic Elements | — | 8,320 |
| Maximum User I/O Pins | — | 382 |
| Embedded System Blocks (ESBs) | — | 4 |
| Total RAM Bits | — | 106,496 |
| Maximum Internal Frequency | — | 250 MHz |
| Core Voltage (VCCINT) | — | 1.71 V to 1.89 V |