EP20K400BC652-1V vs EP20K400BC652-3 比較
詳細な並列比較: EP20K400BC652-1V メーカー: Altera および EP20K400BC652-3 メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP20K400BC652-1V | EP20K400BC652-3 |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $47.95 | $189.00 |
| Series | APEX-20KC | — |
| Family | APEX 20K | APEX 20K |
| Device Sub-Family | EP20K400 | — |
| System Gates | 1,052,000 | — |
| Maximum Logic Elements | 212,992 | — |
| Macrocells / LABs | 16640 | — |
| Embedded Memory (bits) | 212,992 | 212,992 |
| Maximum User I/O | 502 | — |
| Speed Grade | -1 | -3 |
| Clock-to-Output (Tco) | 2.5 ns | — |
| Core Voltage (VCCINT) | 1.8 V | — |
| I/O Voltage (VCCIO) | 2.5 V | — |
| パッケージ | 652-BGA (FineLine, 45 x 45 mm) | BGA-652 (BC652) |
| 実装タイプ | Surface Mount | Surface Mount |
| 動作温度 | 0C to +85C (commercial) | 0 C to +85 C |
| Configuration | SRAM-based, JTAG IEEE 1149.1 | — |
| Architecture | MultiCore (LUT + product-term + ESB) | MultiCore (LUT + product-term + embedded memory) |
| RoHS ステータス | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status] |
| Logic Elements | — | 16,640 |
| Macro Cells | — | 1,664 |
| Maximum User I/Os | — | 502 |
| Number of I/O Banks | — | 8 |
| Supply Voltage (Core) | — | 2.5 V |
| Propagation Delay | — | 3.6 ns |
| Process Technology | — | CMOS |
| Configuration Interface | — | JTAG (IEEE 1149.1), ByteBlaster |
| Design Software | — | Quartus II (legacy) |