EP20K400FI672-2 vs EP20K400FC672-2 比較
詳細な並列比較: EP20K400FI672-2 メーカー: Altera および EP20K400FC672-2 メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Altera
EP20K400FI672-2 - 400K Gates APEX-20K FPGA, 502 I/O, 672-FBGA | Altera
EP20K400FI672-2 Obsolete仕様比較
| パラメータ | EP20K400FI672-2 | EP20K400FC672-2 |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $92.40 | $171.00 |
| Family | APEX-20K | APEX-20K (MultiCore) |
| Logic Elements | 16640 | — |
| Maximum Gates | 400,000 gates | — |
| User I/Os | 502 | — |
| Embedded Memory Bits | 212992 | — |
| Number of Macros | 1664 | — |
| Process Technology | 0.22 µm CMOS | 0.22 µm CMOS |
| Core Supply Voltage | 2.5 V | 2.5 V |
| Maximum Internal Frequency | 200 MHz | — |
| Propagation Delay | 2.5 ns | — |
| 動作温度 | 0 °C to +85 °C (Commercial) | 0°C to +85°C (Commercial) |
| Package Type | 672-pin Fine-pitch Ball Grid Array (FBGA/FCBGA) | — |
| PLLs (Phase-Locked Loops) | 4 | — |
| Configuration Modes | JTAG, Passive Serial, Passive Parallel | — |
| RoHS ステータス | Lead-free / RoHS Compliant | [DATA_NEEDED: RoHS status] |
| 実装タイプ | Surface Mount (BGA) | Surface Mount |
| Series | — | APEX-20K |
| Logic Elements / Cells | — | 16640 |
| Number of Macrocells | — | 1664 |
| Number of Logic Blocks | — | [DATA_NEEDED: LAB count] |
| Number of Gates | — | 400000 |
| Embedded Memory (Bits) | — | 212992 |
| Maximum User I/O | — | 502 |
| Number of I/O Banks | — | [DATA_NEEDED: I/O bank count] |
| Operating Frequency (Max) | — | 200 MHz |
| Propagation Delay (tpd) | — | 2.5 ns |
| パッケージ | — | 672-ball FC-FBGA (BBGA) |
| Speed Grade | — | -2 |