EP20K400FI672-2X vs EP20K400FI672-2 比較
詳細な並列比較: EP20K400FI672-2X メーカー: Intel および EP20K400FI672-2 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Altera
EP20K400FI672-2 - 400K Gates APEX-20K FPGA, 502 I/O, 672-FBGA | Altera
EP20K400FI672-2 Obsolete仕様比較
| パラメータ | EP20K400FI672-2X | EP20K400FI672-2 |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | NRND | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $171.00 | $92.40 |
| Family | APEX 20K | APEX-20K |
| Logic Elements | 16,640 | 16640 |
| Typical Gates | 400,000 system gates | — |
| Embedded Memory | 212,992 bits | — |
| User I/O Pins | 496 | — |
| パッケージ | 672-ball BGA (FI672) | — |
| Package Code | BGA | — |
| Terminal Form | Ball | — |
| No. of Terminals | 672 | — |
| Package Shape | Square | — |
| Speed Grade | -2X | — |
| 動作温度 | -40C to +85C (industrial) | 0 °C to +85 °C (Commercial) |
| Core Voltage | 1.8 V | — |
| I/O Voltage Support | 1.8V / 2.5V / 3.3V / 5V (MultiVolt) | — |
| Configuration Method | SRAM (serial EPROM or JTAG) | — |
| JTAG Support | Yes (IEEE 1149.1) | — |
| Process Technology | 0.18 um CMOS, 6-metal | 0.22 µm CMOS |
| RoHS ステータス | [DATA_NEEDED: RoHS compliance] | Lead-free / RoHS Compliant |
| Maximum Gates | — | 400,000 gates |
| User I/Os | — | 502 |
| Embedded Memory Bits | — | 212992 |
| Number of Macros | — | 1664 |
| Core Supply Voltage | — | 2.5 V |
| Maximum Internal Frequency | — | 200 MHz |
| Propagation Delay | — | 2.5 ns |
| Package Type | — | 672-pin Fine-pitch Ball Grid Array (FBGA/FCBGA) |
| PLLs (Phase-Locked Loops) | — | 4 |
| Configuration Modes | — | JTAG, Passive Serial, Passive Parallel |
| 実装タイプ | — | Surface Mount (BGA) |