EP20K400FI784-1 vs EP20K400FI784-2 比較
詳細な並列比較: EP20K400FI784-1 メーカー: Altera および EP20K400FI784-2 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP20K400FI784-1 | EP20K400FI784-2 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $175.00 | $82.40 |
| Family | APEX 20K | — |
| Series | EP20K400 | — |
| Device Type | Loadable PLD (FPGA-class) | — |
| Usable Gates | 400,000 | — |
| Logic Elements | 1,560 | — |
| Embedded Memory (EAB RAM) | 212,992 bits | — |
| Maximum User I/O | 488 | — |
| Maximum Internal Clock Frequency | 6.1 GHz | — |
| Package Type | 784-ball Fine-pitch BGA (S-PBGA-B784) | S-PBGA-B784 (FineLine BGA) |
| 実装タイプ | Surface Mount | Surface Mount |
| 動作接合温度 | -40°C to +100°C (industrial 'I') | — |
| Supply Voltage - Core | 1.8 V | — |
| I/O Standards Supported | 3.3 V / 5 V PCI, LVTTL, LVCMOS | — |
| Dedicated Inputs | 4 | 4 |
| Process Technology | 0.18 µm CMOS, 6-layer metal | [DATA_NEEDED: process node] |
| Boundary Scan | JTAG IEEE 1149.1 | — |
| Lead-Free / RoHS | [DATA_NEEDED: RoHS status] | — |
| Device Family | — | APEX 20K |
| Typical Gates | — | 400,000 |
| Logic Elements (LEs) | — | [DATA_NEEDED: logic elements count] |
| Embedded System Blocks (ESBs) | — | [DATA_NEEDED: ESB count] |
| Maximum User I/O Pins | — | [DATA_NEEDED: user I/O count] |
| Nominal Core Supply Voltage (VCCINT) | — | 2.5 V |
| VCCINT Range | — | 2.375 V to 2.625 V |
| Speed Grade | — | -2 |
| 動作温度範囲 | — | -40 °C to +100 °C |
| Package Pin Count | — | 784 balls |
| Ball Pitch | — | 1.000 mm |
| RoHS ステータス | — | [DATA_NEEDED: RoHS compliance] |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| MSLレベル | — | [DATA_NEEDED: MSL rating] |
| Device Form Factor | — | Loadable PLD |
| Configuration Memory | — | SRAM-based (volatile) |