EP20K400FI784-1 vs EP20K600EFC672-2X 比較
詳細な並列比較: EP20K400FI784-1 メーカー: Altera および EP20K600EFC672-2X メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP20K400FI784-1 | EP20K600EFC672-2X |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $175.00 | $115.00 |
| Family | APEX 20K | APEX 20KE |
| Series | EP20K400 | — |
| Device Type | Loadable PLD (FPGA-class) | — |
| Usable Gates | 400,000 | — |
| Logic Elements | 1,560 | — |
| Embedded Memory (EAB RAM) | 212,992 bits | — |
| Maximum User I/O | 488 | 508 |
| Maximum Internal Clock Frequency | 6.1 GHz | — |
| Package Type | 784-ball Fine-pitch BGA (S-PBGA-B784) | 672-pin FineLine BGA (FC-FBGA) |
| 実装タイプ | Surface Mount | — |
| 動作接合温度 | -40°C to +100°C (industrial 'I') | — |
| Supply Voltage - Core | 1.8 V | — |
| I/O Standards Supported | 3.3 V / 5 V PCI, LVTTL, LVCMOS | — |
| Dedicated Inputs | 4 | — |
| Process Technology | 0.18 µm CMOS, 6-layer metal | 0.15 µm all-layer copper CMOS |
| Boundary Scan | JTAG IEEE 1149.1 | — |
| Lead-Free / RoHS | [DATA_NEEDED: RoHS status] | — |
| Typical Gates | — | 600,000 |
| Logic Elements / Cells | — | 24,320 |
| Embedded Memory Bits | — | 311,296 |
| Number of PLLs | — | 4 |
| Package Size | — | 45 x 45 mm, 1.27 mm pitch |
| Core Voltage | — | 1.8 V |
| Propagation Delay (typical) | — | 1.48 ns |
| Maximum Internal Frequency | — | 200 MHz |
| 動作温度 | — | 0 °C to +85 °C (commercial) |
| Lead-Free Variant | — | EP20K600EFC672-2N |
| RoHS ステータス | — | Not RoHS compliant (X suffix is SnPb); use -2N suffix for lead-free |
| Configuration Method | — | Serial / Parallel (Quartus-supported) |