EP20K400GC655-1 vs EP20K400EBC652-1X 比較
詳細な並列比較: EP20K400GC655-1 メーカー: Intel および EP20K400EBC652-1X メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Intel
EP20K400GC655-1 - 400K Gate APEX 20K FPGA, 655-pin CPGA | Intel/Altera
EP20K400GC655-1 Obsolete
仕様比較
| パラメータ | EP20K400GC655-1 | EP20K400EBC652-1X |
|---|---|---|
| ブランド | Intel | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $135.00 | $92.00 |
| Family | APEX 20K | APEX 20KE |
| Series | EP20K400 | APEX-20KE® |
| Logic Elements | 16,640 | — |
| Maximum Gates | 1,052,000 | — |
| Typical Gates | 400,000 | — |
| Embedded System Blocks (ESBs) | 4 | — |
| Total RAM Bits | 212,992 | — |
| Maximum User I/O | 502 | — |
| Dedicated Inputs | 6 | — |
| Process Technology | 0.22 µm CMOS | 0.22 µm CMOS |
| Core Supply Voltage | 2.5 V | — |
| I/O Supply Voltage | 3.3 V | — |
| Maximum Internal Frequency | 250 MHz | — |
| Propagation Delay | 2.5 ns | — |
| パッケージ | 655-pin CPGA (Ceramic Pin Grid Array) | — |
| ピン数 | 655 | — |
| 実装タイプ | Through-Hole | Surface Mount |
| 動作温度 | 0 °C to +85 °C (commercial) | 0 °C to +85 °C (Commercial) |
| Configuration Modes | Passive Serial, Passive Parallel Async, Passive Parallel Sync | — |
| Boundary Scan | IEEE 1149.1 (JTAG) | — |
| RoHS ステータス | Non-compliant (contains lead in ceramic package) | [DATA_NEEDED: not confirmed for this specific lot] |
| Logic Elements / Cells | — | 16640 |
| System Gates | — | 1052000 (typical marketing) |
| Embedded Memory (bits) | — | 212992 |
| Number of Macrocells | — | 1664 |
| Number of User I/Os | — | 488 |
| Supply Voltage - Core | — | 1.8 V (1.71 V to 1.89 V) |
| Supply Voltage - I/O | — | 2.5 V (multi-voltage I/O supported) |
| パッケージ / ケース | — | 652-BGA (45 x 45 mm) |
| Supplier Device Package | — | 652-BGA |
| Speed Grade | — | -1X (faster bin) |
| Propagation Delay (per macrocell) | — | [DATA_NEEDED: per-datasheet ns] |
| Lead-Free | — | Yes (per modern distribution) |