EP20K400GC655-1V vs EP20K400GC655-1 比較
詳細な並列比較: EP20K400GC655-1V メーカー: Altera および EP20K400GC655-1 メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Intel
EP20K400GC655-1 - 400K Gate APEX 20K FPGA, 655-pin CPGA | Intel/Altera
EP20K400GC655-1 Obsolete仕様比較
| パラメータ | EP20K400GC655-1V | EP20K400GC655-1 |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $555.00 | $135.00 |
| Family | APEX 20KE | APEX 20K |
| Logic Elements | 16,640 | 16,640 |
| Typical Gate Count | 400,000 gates | — |
| Embedded Memory | 212,992 bits | — |
| Maximum User I/O | 496 | 502 |
| Dedicated Inputs | 6 | 6 |
| パッケージ | CBGA-655 (Ceramic Ball Grid Array) | 655-pin CPGA (Ceramic Pin Grid Array) |
| Total Terminals | 655 | — |
| Supply Voltage (Core) | 2.375 V to 2.625 V (nominal 2.5 V) | — |
| Propagation Delay | 2.5 ns | 2.5 ns |
| Maximum Internal Frequency | 250 MHz (-1V speed grade) | 250 MHz |
| Process Technology | 0.22 µm CMOS | 0.22 µm CMOS |
| LVDS Support | Yes | — |
| Moisture Sensitivity Level | MSL 1 | — |
| Peak Reflow Temperature | 220 °C | — |
| Qualification | Not Qualified | — |
| Programming Interface | IEEE 1532 / JTAG | — |
| Series | — | EP20K400 |
| Maximum Gates | — | 1,052,000 |
| Typical Gates | — | 400,000 |
| Embedded System Blocks (ESBs) | — | 4 |
| Total RAM Bits | — | 212,992 |
| Core Supply Voltage | — | 2.5 V |
| I/O Supply Voltage | — | 3.3 V |
| ピン数 | — | 655 |
| 実装タイプ | — | Through-Hole |
| 動作温度 | — | 0 °C to +85 °C (commercial) |
| Configuration Modes | — | Passive Serial, Passive Parallel Async, Passive Parallel Sync |
| Boundary Scan | — | IEEE 1149.1 (JTAG) |
| RoHS ステータス | — | Non-compliant (contains lead in ceramic package) |