EP20K400GC655-1X vs EP20K400GI655-1 比較
詳細な並列比較: EP20K400GC655-1X メーカー: Altera および EP20K400GI655-1 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP20K400GC655-1X | EP20K400GI655-1 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $193.04 | $195.00 |
| Product Family | Altera APEX 20K | — |
| Device Type | Field Programmable Gate Array (FPGA) | — |
| Technology | CMOS | CMOS, SRAM-based |
| Gate Count | 400K gates | — |
| Logic Elements | 16640 cells | 16640 |
| Maximum System Frequency | 250 MHz | — |
| Propagation Delay | 2.5 ns | 2.5 ns |
| Core Supply Voltage | 2.5 V | — |
| I/O Supply Voltage | 2.5 V / 3.3 V | — |
| Number of User I/O | 496 | — |
| Number of Dedicated Inputs | 6 | — |
| Number of Terminals | 655 | — |
| Package Type | CPGA-655 (Ceramic Pin Grid Array) | Ceramic Pin Grid Array (CPGA-655) |
| Package Body Material | Ceramic | — |
| Process Technology | 0.22 um | — |
| 動作温度範囲 | [DATA_NEEDED: operating temperature range] | — |
| Embedded RAM Bits | [DATA_NEEDED: embedded RAM bits] | — |
| RoHS ステータス | unknown | Compliant |
| Family | — | APEX 20K |
| Device Series | — | EP20K400 |
| Typical Gates | — | 400000 |
| Maximum User I/O | — | 502 |
| Dedicated Inputs | — | 4 |
| Total Terminals | — | 655 |
| JESD-30 Package Code | — | S-CPGA-P655 |
| 動作温度 | — | -40C to +85C (Industrial) |
| Moisture Sensitivity Level | — | MSL 1 |
| Peak Reflow Temperature | — | 220 C |
| Programmability | — | In-system, JTAG boundary-scan (IEEE 1149.1) |
| Process Node | — | 0.18 micrometer CMOS |