EP20K600CB652C7E5 vs EP20K600CB652C8N 比較
詳細な並列比較: EP20K600CB652C7E5 メーカー: Intel および EP20K600CB652C8N メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP20K600CB652C7E5 | EP20K600CB652C8N |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $175.00 | $115.00 |
| Family | APEX 20KC | APEX 20KC |
| Typical Gate Count | 600K gates | — |
| Logic Elements / Macros | 24,320 | — |
| Maximum User I/O | 488 | — |
| Embedded Memory (EAB bits) | 311,296 bits | — |
| パッケージ | 652-ball FineLine BGA | 652-ball LBGA, 45 x 45 mm, 1.27 mm pitch |
| Core Voltage | 1.8 V | — |
| Process Technology | 0.15 um CMOS | 0.18 µm all-layer copper-metal |
| 動作温度 | 0C to +85C (commercial, suffix C7) | 0 °C to 85 °C (commercial) |
| Speed Grade | 7 (-1 speed bin equivalent, E5 suffix) | C8 |
| PLL Count | 4 | — |
| Supported I/O Standards | LVTTL, LVCMOS, PCI, SSTL, HSTL | — |
| Configuration Scheme | Passive Serial / JTAG / EPC16 / EPC8 | — |
| RoHS ステータス | [DATA_NEEDED: RoHS compliance status] | unknown |
| ライフサイクル状態 | Obsolete - last time buy has passed | — |
| Device Type | — | Loadable PLD / FPGA |
| System Gates | — | 600,000 |
| Logic Elements | — | 24,320 cells |
| Embedded Memory | — | 311,296 bits |
| User I/O Pins | — | 488 |
| Dedicated Inputs | — | 4 |
| Outputs | — | 480 |
| Propagation Delay (typ.) | — | 1.48 ns |
| Pin-to-Pin Timing | — | 1.78 ns |
| Internal Frequency (typ.) | — | 301.21 MHz |
| Core Supply Voltage | — | 1.8 V nominal (1.71 V to 1.89 V) |
| 実装タイプ | — | Surface Mount (BGA) |
| Architecture | — | MultiCore LUT + Embedded System Blocks (ESB) |
| Pin-Compatible With | — | APEX 20KE family |