EP20K600CB652C7ES vs EP20K400EBC652-1X 比較
詳細な並列比較: EP20K600CB652C7ES メーカー: Altera および EP20K400EBC652-1X メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP20K600CB652C7ES | EP20K400EBC652-1X |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $195.00 | $92.00 |
| Family | APEX 20KC | APEX 20KE |
| Logic Elements | 24,320 | — |
| System Gates | 600,000 | 1052000 (typical marketing) |
| Maximum System Gates | 1,053,840 | — |
| Embedded Memory Bits | 311,296 | — |
| Embedded System Blocks (ESB) | 26 | — |
| Maximum User I/O | 488 | — |
| User I/O (this package) | 488 (652-BGA) | — |
| Supply Voltage - Core | 1.71 V to 1.89 V (1.8 V nominal) | 1.8 V (1.71 V to 1.89 V) |
| Maximum Internal Clock Frequency | 1666.6 MHz | — |
| Propagation Delay | 1.6 ns | — |
| Process Technology | 0.15 µm CMOS | 0.22 µm CMOS |
| 動作温度 | 0 °C to +85 °C (commercial) | 0 °C to +85 °C (Commercial) |
| Package Type | 652-ball FineLine BGA | — |
| JEDEC Package Code | S-PBGA-B652 | — |
| Configuration Modes | Passive Serial, Passive Parallel, JTAG | — |
| JTAG Boundary Scan | IEEE 1149.1 compliant | — |
| RoHS ステータス | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: not confirmed for this specific lot] |
| PLLs | 4 | — |
| 実装タイプ | Surface Mount (BGA) | Surface Mount |
| Series | — | APEX-20KE® |
| Logic Elements / Cells | — | 16640 |
| Embedded Memory (bits) | — | 212992 |
| Number of Macrocells | — | 1664 |
| Number of User I/Os | — | 488 |
| Supply Voltage - I/O | — | 2.5 V (multi-voltage I/O supported) |
| パッケージ / ケース | — | 652-BGA (45 x 45 mm) |
| Supplier Device Package | — | 652-BGA |
| Speed Grade | — | -1X (faster bin) |
| Propagation Delay (per macrocell) | — | [DATA_NEEDED: per-datasheet ns] |
| Lead-Free | — | Yes (per modern distribution) |