EP20K600CB652I8N vs EP20K600CB652C9N 比較
詳細な並列比較: EP20K600CB652I8N メーカー: Intel および EP20K600CB652C9N メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP20K600CB652I8N | EP20K600CB652C9N |
|---|---|---|
| ブランド | Intel | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | NRND | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $175.00 | $128.00 |
| Family | APEX 20KC | APEX 20KC |
| Device Type | FPGA (Field Programmable Gate Array) | Loadable PLD (FPGA) |
| System Gates | 600,000 | — |
| Logic Elements / Cells | 24,320 | — |
| Maximum Operating Frequency | 301.21 MHz | — |
| Propagation Delay (typical) | 1.78 ns | — |
| User I/O Pins | 488 | — |
| Embedded Memory (ESB) | 311,296 bits | — |
| Supply Voltage (Core) | 1.71 V to 1.89 V (1.8 V nominal) | — |
| Process Technology | 0.15 µm CMOS | 0.15 micron all-layer copper CMOS |
| パッケージ | 652-pin PBGA (S-PBGA-B652) | BGA-652 (652-ball FineLine BGA, 45 x 45 mm, 1.27 mm pitch) |
| Package Size | 45 mm x 45 mm | — |
| Terminal Pitch | 1.27 mm | — |
| Operating Temperature Grade | Industrial (-40 °C to +85 °C) | — |
| Configuration Interface | JTAG / Serial / ISP | JTAG (IEEE 1149.1) and serial/PROM configuration |
| RoHS ステータス | [DATA_NEEDED: lead-free/RoHS status] | [DATA_NEEDED: rohs status] |
| Typical Gates | — | 600,000 |
| Logic Elements | — | 24,320 |
| Maximum User I/O | — | 488 |
| Core Supply Voltage | — | 1.8 V |
| Speed Grade | — | C9 (~1.48 ns propagation delay) |
| Architecture | — | MultiCore LUT + embedded system memory (ESB) |
| On-chip Memory | — | Embedded system memory blocks (dual-port RAM, FIFO) |
| 動作温度 | — | 0 C to 85 C (commercial) |
| 実装タイプ | — | Surface Mount (BGA) |
| Pin/Pin Compatibility | — | Pin-compatible with APEX 20KE devices of same package |
| Toolchain | — | Altera/Intel Quartus II (legacy APEX support) |
| MSLレベル | — | [DATA_NEEDED: MSL level] |