EP20K600CB652I9N vs EP20K600CB652I7N 比較
詳細な並列比較: EP20K600CB652I9N メーカー: Altera および EP20K600CB652I7N メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Altera
EP20K600CB652I9N - 600K APEX 20KC FPGA, 652-BGA, Industrial | Altera
EP20K600CB652I9N Obsolete仕様比較
| パラメータ | EP20K600CB652I9N | EP20K600CB652I7N |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価(USD) | $158.00 | $158.00 |
| Family | APEX 20KC | APEX 20KC |
| Logic Elements | 24,320 | — |
| System Gates | 600,000 | — |
| Maximum Operating Frequency | 250 MHz | 375.94 MHz |
| Process Technology | 0.15 um CMOS | 0.15 µm CMOS |
| Core Voltage | 1.8 V | — |
| I/O Voltage | 3.3 V | — |
| Total I/O Pins | 488 | — |
| General-Purpose I/O | 480 | — |
| Dedicated Inputs | 4 | — |
| パッケージ | 652-BGA (PBGA652) | 652-pin FineLine BGA |
| Terminal Pitch | 1.27 mm | — |
| 動作温度 | -40C to +100C (Industrial) | — |
| Configuration Method | Passive Serial / Passive Parallel / JTAG | SRAM-based, JTAG (IEEE 1149.1) |
| Embedded Memory | ESB (Embedded System Block) RAM / CAM | — |
| I/O Standards | LVDS, PCI, LVTTL, LVCMOS | — |
| Typical Gates | — | 600,000 |
| Logic Elements (Cells) | — | 24,320 |
| Core Supply Voltage (VCCINT) | — | 1.8 V |
| 実装タイプ | — | Surface Mount (BGA) |
| User I/O Banks | — | [DATA_NEEDED: User I/O Banks] |
| Maximum User I/O | — | [DATA_NEEDED: Maximum User I/O] |
| Embedded System Block (ESB) Memory | — | 311,040 bits |
| Phase-Locked Loops (PLLs) | — | 4 |
| Operating Temperature Grade | — | Industrial (-40C to +100C) |
| Speed Grade | — | 7 |
| RoHS ステータス | — | unknown |