EP20K600CF672C6 vs EP20K600CF672C-8 比較
詳細な並列比較: EP20K600CF672C6 メーカー: Altera および EP20K600CF672C-8 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Altera
EP20K600CF672C-8 - APEX 20KC FPGA 600K Gates 24320 LEs 672-BGA | Intel / Altera
EP20K600CF672C-8 Obsolete仕様比較
| パラメータ | EP20K600CF672C6 | EP20K600CF672C-8 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $480.00 | $1,150.00 |
| Family | APEX 20KC | — |
| Typical Gate Count | 600,000 gates | — |
| Logic Elements (LEs) | 24,320 | 24,320 |
| Embedded System Blocks (ESBs) | 160 (each 2,048 bits) | — |
| Maximum Embedded RAM | 311,296 bits (311 kbit) | — |
| Maximum User I/O Pins | 508 | — |
| パッケージ | 672-ball FineLine BGA (CF672) | — |
| Package Body Size | 27 mm × 27 mm | — |
| Speed Grade | -6 (C6) | -8 |
| 動作温度 | 0 °C to +85 °C (commercial) | — |
| Core Voltage | 1.8 V | — |
| I/O Standards Supported | LVCMOS, LVTTL, HSTL, SSTL, GTL+ | — |
| Embedded PLLs | 4 | — |
| Process Technology | 0.18 µm CMOS, 6 metal layers | 0.15 micrometer all-layer copper-metal |
| Configuration Method | SRAM-based, JTAG, EPC16/EPC2 | Serial / parallel / JTAG |
| RoHS ステータス | Non-RoHS (legacy process) | [DATA_NEEDED: RoHS status] |
| Series | — | APEX 20KC |
| Device Type | — | FPGA (Field Programmable Gate Array) |
| Typical Gates | — | 600,000 |
| Embedded Memory Bits | — | 311,296 |
| Maximum User I/Os | — | 508 |
| ピン数 | — | 672 |
| Package Type | — | 672-BGA (FineLine BGA, 1.27 mm pitch, 45 x 45 mm) |
| Propagation Delay (tPD) | — | 1.48 ns |
| Architecture | — | MultiCore (LUT logic + embedded memory) |
| 動作温度範囲 | — | 0C to +85C (commercial) |
| 電源電圧 | — | Multi-rail (core + I/O banks) |
| Pin Compatibility | — | Pin-compatible with APEX 20KE family |