EP20K600CF672I9 vs EP20K600CF672I8 比較
詳細な並列比較: EP20K600CF672I9 メーカー: Intel および EP20K600CF672I8 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP20K600CF672I9 | EP20K600CF672I8 |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $152.00 | $195.00 |
| Family | APEX 20KC | APEX 20KC |
| Logic Elements / Cells | 24,320 | 24,320 |
| System Gates | 600,000 | — |
| Maximum Operating Frequency | 250 MHz | — |
| Process Technology | 0.15 µm CMOS | 0.15 µm all-layer copper |
| Core Voltage | 1.8 V | — |
| パッケージ | 672-pin FC-FBGA | — |
| 実装タイプ | Surface Mount (BGA) | Surface Mount |
| Temperature Grade | Industrial (-40°C to +85°C) | — |
| Speed Grade | 9 (fastest bin) | — |
| User I/O Pins | 311 (max) | — |
| Embedded Array Blocks (EABs) | [DATA_NEEDED: EAB count] | — |
| Embedded Memory | [DATA_NEEDED: total RAM bits] | 311,296 bits |
| PLLs | Up to 4 | — |
| I/O Standards Supported | LVTTL, LVCMOS, PCI, LVDS | — |
| Configuration Mode | Passive Serial / JTAG | — |
| Maximum Seated Height | 2.1 mm | — |
| RoHS ステータス | [DATA_NEEDED: RoHS status] | Compliant per legacy product records |
| MSLレベル | [DATA_NEEDED: MSL level] | — |
| Lead-Free | [DATA_NEEDED: lead-free] | — |
| Device Type | — | SPLD / FPGA |
| Macros (Logic Cells) | — | 2432 |
| Typical Gate Count | — | 600,000 gates |
| User I/Os | — | 488 to 508 |
| ピン数 | — | 652 (functional) / 672 (BGA balls) |
| Propagation Delay (typical) | — | 1.48 ns |
| Internal Frequency (max) | — | [DATA_NEEDED: max internal frequency in MHz] |
| Core Supply Voltage | — | 1.8 V |
| 動作温度 | — | 0 °C to +85 °C (Industrial) |
| Package Type | — | 672-ball BGA, 45 x 45 mm, 1.27 mm pitch |
| Configuration Interface | — | JTAG / Passive Serial |
| Design Tool | — | Quartus II (legacy MAX+PLUS II) |