EP20K600EBC652-3 vs EP20K600CB652C9 比較
詳細な並列比較: EP20K600EBC652-3 メーカー: Intel および EP20K600CB652C9 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP20K600EBC652-3 | EP20K600CB652C9 |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $340.00 | $142.50 |
| Series | APEX-20KE | — |
| Family | APEX 20K | APEX 20KC |
| Device Type | FPGA (Field Programmable Gate Array) / SPLD Loadable | — |
| Logic Elements | 24320 | — |
| Embedded Memory | 311296 bits | — |
| User I/Os | 488 | — |
| Number of Terminals | 652 | — |
| Package Type | BGA-652 (45 x 45 mm, 1.27 mm pitch) | — |
| 実装タイプ | Surface Mount | Surface Mount (BGA) |
| Propagation Delay | 1.48 ns | — |
| 動作温度 | 0 C to 85 C | 0 °C to 85 °C (commercial) |
| Speed Grade | -3 | — |
| Process Technology | 0.15-micron all-layer copper CMOS | 0.15 µm all-layer copper CMOS |
| Core Voltage | [DATA_NEEDED: core voltage] | — |
| I/O Voltage Support | Multi-volt 3.3 V / 2.5 V / 1.8 V | — |
| Configuration Method | JTAG / serial / passive parallel | — |
| PLLs | 4 | — |
| RoHS ステータス | [DATA_NEEDED: RoHS status] | Compliant (per Altera product page) |
| Lead-Free | [DATA_NEEDED: lead-free] | — |
| Logic Elements / Cells | — | 24,320 |
| Number of LABs / CLBs | — | 2,432 |
| System Gates | — | 1,537,000 |
| Total RAM Bits | — | 311,296 |
| User I/O | — | 488 |
| Number of I/O Banks | — | [DATA_NEEDED: I/O bank count] |
| 電源電圧 | — | 1.71 V to 1.89 V |
| Internal Datapath Frequency | — | up to 250 MHz |
| Propagation Delay (typ.) | — | 1.48 ns |
| パッケージ | — | 652-BGA (45 × 45 mm, 1.27 mm pitch) |
| Configuration | — | JTAG IEEE 1149.1 / serial / EPC2-compatible |
| Product Status | — | Obsolete (per distributor listings) |