EP20K600EBC652-3 vs EP20K600CB652I7 比較
詳細な並列比較: EP20K600EBC652-3 メーカー: Intel および EP20K600CB652I7 メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP20K600EBC652-3 | EP20K600CB652I7 |
|---|---|---|
| ブランド | Intel | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $340.00 | $149.00 |
| Series | APEX-20KE | — |
| Family | APEX 20K | APEX 20KC |
| Device Type | FPGA (Field Programmable Gate Array) / SPLD Loadable | — |
| Logic Elements | 24320 | 24,320 |
| Embedded Memory | 311296 bits | ESBs configurable as dual-port RAM / ROM / CAM |
| User I/Os | 488 | — |
| Number of Terminals | 652 | — |
| Package Type | BGA-652 (45 x 45 mm, 1.27 mm pitch) | — |
| 実装タイプ | Surface Mount | Surface Mount |
| Propagation Delay | 1.48 ns | 1.6 ns |
| 動作温度 | 0 C to 85 C | -40 °C to +85 °C (industrial, 'I' suffix) |
| Speed Grade | -3 | -7 |
| Process Technology | 0.15-micron all-layer copper CMOS | — |
| Core Voltage | [DATA_NEEDED: core voltage] | — |
| I/O Voltage Support | Multi-volt 3.3 V / 2.5 V / 1.8 V | — |
| Configuration Method | JTAG / serial / passive parallel | — |
| PLLs | 4 | — |
| RoHS ステータス | [DATA_NEEDED: RoHS status] | unknown |
| Lead-Free | [DATA_NEEDED: lead-free] | — |
| Manufacturer | — | Intel (formerly Altera) |
| Technology | — | 0.15 µm CMOS, SRAM-based |
| System Gates | — | 600,000 |
| Maximum Internal Frequency | — | 375.94 MHz |
| Core Supply Voltage | — | 1.8 V (1.71 V to 1.89 V range) |
| User I/O Count | — | 488 (4 dedicated inputs + 480 I/O) |
| 出力数 | — | 480 |
| パッケージ | — | 652-ball FineLine BGA (LBGA, 1.27 mm pitch) |
| Programming Interface | — | JTAG (IEEE 1149.1), in-system programmable |
| MultiVolt I/O Support | — | 1.8 V / 2.5 V / 3.3 V / 5.0 V tolerant banks |