EP2A25F672ES vs EP2A25F672C7N 比較
詳細な並列比較: EP2A25F672ES メーカー: Altera および EP2A25F672C7N メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP2A25F672ES | EP2A25F672C7N |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $198.00 | $195.00 |
| Family | APEX II | APEX II |
| Logic Elements | 24,320 | 24,320 cells |
| Maximum Gates | 900,000 | — |
| Embedded System Blocks (ESBs) | 24 | — |
| Maximum Embedded RAM | 1.4 Mbit | — |
| Maximum User I/O Pins | 492 | — |
| パッケージ | 672-ball FC-FBGA | — |
| Process Technology | 0.15 µm CMOS | 0.15 µm all-layer copper (up to 8 metal layers) |
| Core Voltage | 1.5 V | — |
| Maximum System Clock Frequency | 500 MHz | — |
| Number of PLLs | 4 | — |
| I/O Banks | 16 | — |
| Supported I/O Standards | LVTTL, LVCMOS, PCI, LVDS, LVPECL, HSTL | — |
| Configuration Mode | Serial / Parallel / JTAG | — |
| 動作温度範囲 | [DATA_NEEDED: operating temperature range] | — |
| RoHS ステータス | Compliant | [DATA_NEEDED: RoHS compliance] |
| System Gates | — | Approximately 900,000 |
| User I/Os | — | 492 |
| Propagation Delay (tPD) | — | 1.69 ns |
| Internal Operating Frequency | — | Up to 500 MHz |
| Core Voltage (VCCINT) | — | 1.5 V |
| Logic Family | — | CMOS |
| Package Type | — | 672-ball FC-FBGA (FineLine BGA) |
| Package Body Size | — | 27 x 27 mm |
| Ball Pitch | — | 1.0 mm |
| 動作温度 | — | 0 °C to 85 °C (commercial) |
| High-Speed I/O Support | — | True-LVDS, LVPECL, PCML, HyperTransport up to 1 Gbps |
| Programmable Logic Type | — | Loadable PLD (in-system programmable) |
| Embedded Memory | — | Embedded System Blocks (ESB) configurable as dual-port RAM/ROM |
| PLLs | — | Up to 4 |
| 実装タイプ | — | Surface Mount |