EP2A40B652C7 vs EP2A40F33C-7 比較
詳細な並列比較: EP2A40B652C7 メーカー: Intel および EP2A40F33C-7 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP2A40B652C7 | EP2A40F33C-7 |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | ラストバイ | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $0.00 | $112.00 |
| Device Family | APEX II | — |
| Logic Elements | 40,000 LEs | 40,960 LEs |
| Maximum User I/O Pins | 538 (per package, [DATA_NEEDED: exact count for BGA-652]) | — |
| パッケージ | 652-ball FineLine BGA | 33 mm FineLine BGA (F33) |
| Embedded Memory | [DATA_NEEDED: ESB RAM bits for EP2A40] | 342 Kbits dual-port RAM |
| Number of PLLs | [DATA_NEEDED: PLL count for EP2A40] | — |
| Operating Temperature Grade | Commercial (C suffix) | — |
| Speed Grade | 7 | -7 |
| I/O Standards Supported | LVTTL, LVCMOS, PCI, GTL+, SSTL, LVDS, LVPECL | — |
| Supply Voltage (Core) | 1.8 V nominal [DATA_NEEDED: exact tolerance] | — |
| Supply Voltage (I/O) | Multi-voltage I/O [DATA_NEEDED: VCCIO range] | — |
| Process Technology | [DATA_NEEDED: process node] | 0.15 µm CMOS |
| Configuration Method | SRAM-based, supported via EPC configuration devices | Passive serial / parallel / JTAG |
| RoHS ステータス | Unknown | — |
| 実装タイプ | Surface Mount (BGA) | — |
| MSLレベル | [DATA_NEEDED: MSL rating] | — |
| Family | — | APEX II |
| Typical Gates | — | 1,500,000 system gates |
| Maximum User I/O | — | [DATA_NEEDED: user I/O count] |
| Core Voltage | — | 1.5 V |
| I/O Voltage Support | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V (multi-bank) |
| PLLs | — | Up to 4 |
| 動作温度 | — | Commercial (0 °C to +85 °C) |
| Moisture Sensitivity Level | — | MSL 3 |
| Peak Reflow Temperature | — | 220 °C |
| Design Software | — | Quartus II (legacy) |