EP2A40F1020C8N vs EP2A40F1020I7N 比較
詳細な並列比較: EP2A40F1020C8N メーカー: Intel および EP2A40F1020I7N メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP2A40F1020C8N | EP2A40F1020I7N |
|---|---|---|
| ブランド | Intel | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $0.00 | $142.00 |
| Product Type | Field-Programmable Gate Array (FPGA) | — |
| Device Family | APEX II | — |
| Logic Technology | CMOS | — |
| Logic Gates | 1.5 million | — |
| Logic Cells | 38,400 | — |
| Nominal Supply Voltage | 1.5 V | — |
| Supply Voltage Range | 1.425 V to 1.575 V | — |
| User I/Os | 735 | — |
| Package Terminal Count | 1,020 pins | — |
| Package Type | FC-FBGA, BGA-1020 | — |
| Package Body Size | 33 mm x 33 mm | — |
| Ball Pitch | 1 mm | — |
| Reported Operating Frequency | 376 MHz | — |
| Alternative Reported Frequency | 562 MHz | — |
| Reported Propagation Delay | 1.78 ns | — |
| Alternative Reported Propagation Delay | 1.55 ns | — |
| Fabrication Process | 0.15 µm | — |
| Maximum Reported Metal Layers | 8 layers | — |
| 動作温度 | 0 °C to 85 °C | -40C to +100C (Industrial) |
| 実装タイプ | Surface Mount | Surface Mount |
| Terminal Form | Ball | — |
| RoHS ステータス | unknown | [DATA_NEEDED: RoHS status] |
| REACH Status | unknown | — |
| AEC-Q100 Qualification | unknown | — |
| Family | — | APEX II |
| Device Logic Elements | — | 38,400 cells |
| System Gates | — | 1,500,000 |
| Maximum Operating Frequency | — | 562 MHz |
| Process Technology | — | 0.15 µm |
| Core Voltage | — | 1.5 V |
| パッケージ | — | 1020-pin FC-FBGA |
| Speed Grade | — | I7 |
| Architecture | — | PLA-type / Look-up Table hybrid |
| Number of PLLs | — | [DATA_NEEDED: PLL count] |
| Embedded Memory | — | [DATA_NEEDED: total embedded memory bits] |
| User I/O Pins | — | [DATA_NEEDED: user I/O pin count] |
| Design Software | — | Quartus II |