EP2A40F1020I9N vs EP2A40F1020C9N 比較
詳細な並列比較: EP2A40F1020I9N メーカー: Intel および EP2A40F1020C9N メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP2A40F1020I9N | EP2A40F1020C9N |
|---|---|---|
| ブランド | Intel | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $165.00 | $175.00 |
| Family | APEX II | APEX II |
| Device Logic Elements / Cells | 38,400 cells | — |
| System Gates | 1,500,000 (1.5 M) | 1.5 M |
| Maximum Operating Frequency | 366 MHz | 366 MHz |
| Process Technology | 0.15 um CMOS, up to 8 metal layers | 0.15 µm all-layer copper (up to 8 metal layers) |
| Core Supply Voltage | 1.5 V | — |
| User I/O Count | 735 bidirectional I/O | — |
| パッケージ | 1020-pin FC-FBGA (Flip-Chip FineLine BGA) | 1020-ball FC-FBGA, 33 × 33 mm, 1 mm pitch, FineLine |
| Operating Temperature Grade | Industrial (I9 suffix: -40C to +100C per Altera APEX II convention) | — |
| High-Speed I/O Standards | True-LVDS (up to 1 Gbps), LVPECL, PCML, HyperTransport | — |
| Embedded Memory | ESB-based True-Dual-Port/Single-Port RAM, ROM, CAM (bits [DATA_NEEDED: total RAM bits]) | — |
| Clock Management | PLLs (count [DATA_NEEDED: PLL count]) | — |
| Configuration Modes | Passive Serial, Passive Parallel Asynchronous/Synchronous, JTAG | Passive Serial, Passive Parallel, JTAG |
| 実装タイプ | Surface Mount (BGA) | Surface Mount (BGA) |
| RoHS ステータス | [DATA_NEEDED: RoHS status] | unknown |
| ライフサイクル状態 | Obsolete (per distributor listings / Altera APEX II family EOL) | — |
| Series | — | EP2A40 |
| Device Type | — | FPGA (Field-Programmable Gate Array) |
| Logic Family | — | CMOS |
| Logic Cells / Elements | — | 38,400 |
| Propagation Delay | — | 1.55 ns |
| Core Voltage | — | 1.5 V |
| User I/O Pins | — | 735 |
| Total Pins | — | 1020 |
| 動作温度 | — | 0 °C to 85 °C |
| I/O Standards | — | True-LVDS, LVPECL, PCML, HyperTransport, LVTTL, LVCMOS, PCI, GTL+, SSTL |
| On-chip Memory | — | Embedded System Blocks (ESB) for RAM/ROM |