EP2A70B724I-8 vs EP2A70B724C9 比較
詳細な並列比較: EP2A70B724I-8 メーカー: Altera および EP2A70B724C9 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP2A70B724I-8 | EP2A70B724C9 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $119.00 | $998.27 |
| Family | APEX II | APEX II |
| Logic Elements / Cells | 67,200 cells | — |
| System Gates | 3,000,000 | — |
| Maximum Internal Frequency | 281 MHz | — |
| Process Technology | 0.15 µm CMOS | 0.15 um all-layer copper (up to 8 metal layers) |
| Core Supply Voltage | 1.5 V | — |
| I/O Supply Voltage | 3.3 V | — |
| ピン数 | 724 | — |
| Package Type | FCBGA (Flip-Chip Ball Grid Array) | — |
| 動作温度 | -40 °C to +100 °C (Industrial) | 0C to +85C (commercial) |
| Peak Reflow Temperature | 220 °C (per JEDEC J-STD-020) | — |
| User I/O Banks | [DATA_NEEDED: user I/O bank count] | — |
| User I/O Pins | [DATA_NEEDED: user I/O pin count] | — |
| Embedded System Blocks (ESBs) | [DATA_NEEDED: ESB count] | — |
| Embedded Array Blocks (EABs) | [DATA_NEEDED: EAB count] | — |
| Embedded RAM | [DATA_NEEDED: total bits] | — |
| PLLs | [DATA_NEEDED: PLL count] | Up to 4 |
| Configuration Method | JTAG / Passive Serial / Passive Parallel | — |
| 実装タイプ | Surface Mount | Surface Mount (BGA) |
| MSLレベル | [DATA_NEEDED: MSL level] | [DATA_NEEDED: MSL level] |
| RoHS ステータス | [DATA_NEEDED: RoHS compliance] | Non-compliant (per IC-Components listing) |
| Logic Elements | — | 67200 |
| Embedded Memory (bits) | — | 1146880 |
| User I/O Count | — | 540 |
| パッケージ | — | 724-BBGA, FCBGA (FineLine BGA) |
| LVDS Channels | — | Up to 8 LVDS pairs at 1 Gbps |
| I/O Standards Supported | — | True-LVDS, LVPECL, PCML, HyperTransport |
| Embedded Memory Type | — | ESB (synchronous, self-timed WE, true dual-port / simple dual-port / single-port) |
| Speed Grade | — | C9 (commercial, speed bin 9) |
| Supply Voltage (core) | — | 1.5 V |