EP2C50F672C8N vs EP2C50F672C7 比較
詳細な並列比較: EP2C50F672C8N メーカー: Intel および EP2C50F672C7 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP2C50F672C8N | EP2C50F672C7 |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | ラストバイ | ラストバイ |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $148.75 | $184.59 |
| Series | Cyclone II | — |
| Number of Logic Elements | 50,528 | — |
| Number of Logic Array Blocks (LABs) | 4,608 | — |
| Total RAM Bits | 594,432 | — |
| Number of I/O | 450 | — |
| Number of User I/O Banks | 8 (per family architecture) | — |
| Number of PLLs | 4 | — |
| Number of DLLs | 2 | — |
| Embedded 18x18 Multipliers | 86 | 86 (150 per device family datasheet figure) |
| Core Voltage | 1.2 V | — |
| パッケージ | 672-FBGA (FineLine BGA) | 672-ball FineLine BGA (FBGA-672) |
| Package Body Size | 27 mm x 27 mm | — |
| 実装タイプ | Surface Mount | — |
| 動作温度 | 0C to +85C (commercial) | — |
| Speed Grade | C8 | -7 |
| Process Technology | 90 nm low-k CMOS | 90 nm CMOS with low-k dielectric |
| Configuration | JTAG + serial/parallel | — |
| RoHS ステータス | [DATA_NEEDED: rohs status from datasheet] | — |
| Family | — | Cyclone II |
| Logic Elements (LE) | — | 50,528 |
| Embedded Memory Bits | — | 594,432 bits |
| Embedded Memory Blocks | — | 250 M4K blocks (4 Kbit each) |
| User I/O Pins | — | 450 |
| Phase-Locked Loops (PLL) | — | 4 |
| Global Clock Networks | — | 16 |
| Core Voltage (VCCINT) | — | 1.2 V |
| I/O Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.0 V / 3.3 V (per bank) |
| Temperature Grade | — | Commercial (0C to +85C junction) |
| Configuration Modes | — | Passive Serial (PS), Active Serial (AS), JTAG |
| Lead-Free / RoHS | — | Lead-Free / RoHS compliant per Heisener listing |