EP2C50F672C8N vs EP2S15F672C4 比較
詳細な並列比較: EP2C50F672C8N メーカー: Intel および EP2S15F672C4 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP2C50F672C8N | EP2S15F672C4 |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | ラストバイ | NRND |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $148.75 | $235.00 |
| Series | Cyclone II | — |
| Number of Logic Elements | 50,528 | — |
| Number of Logic Array Blocks (LABs) | 4,608 | — |
| Total RAM Bits | 594,432 | — |
| Number of I/O | 450 | — |
| Number of User I/O Banks | 8 (per family architecture) | — |
| Number of PLLs | 4 | — |
| Number of DLLs | 2 | — |
| Embedded 18x18 Multipliers | 86 | — |
| Core Voltage | 1.2 V | — |
| パッケージ | 672-FBGA (FineLine BGA) | 672-ball FineLine BGA (FBGA) |
| Package Body Size | 27 mm x 27 mm | — |
| 実装タイプ | Surface Mount | — |
| 動作温度 | 0C to +85C (commercial) | Commercial (0C to +85C, 'C' suffix) |
| Speed Grade | C8 | 4 |
| Process Technology | 90 nm low-k CMOS | — |
| Configuration | JTAG + serial/parallel | — |
| RoHS ステータス | [DATA_NEEDED: rohs status from datasheet] | [DATA_NEEDED: RoHS compliance per Altera product page] |
| Family | — | Stratix II |
| Logic Elements | — | 15,600 |
| Embedded Memory Bits | — | 419,328 bits |
| DSP Blocks | — | 156 (approximate, per Stratix II family) |
| Maximum User I/Os | — | 366 |
| Process Node | — | 90 nm |
| PLLs | — | 6 |
| Configuration Method | — | Serial / Parallel (passive serial, fast passive parallel, JTAG) |
| I/O Standards Supported | — | LVTTL, LVCMOS, LVDS, SSTL, HSTL (per Stratix II family) |
| Lead-Free | — | [DATA_NEEDED: lead-free finish status] |
| MSLレベル | — | [DATA_NEEDED: MSL moisture sensitivity level] |