EP2C50F672I8N vs EP2C50F672C7 比較
詳細な並列比較: EP2C50F672I8N メーカー: Altera および EP2C50F672C7 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP2C50F672I8N | EP2C50F672C7 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | ラストバイ |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $248.42 | $184.59 |
| Product Type | Field Programmable Gate Array (FPGA) | — |
| Device Family | Cyclone II | — |
| Logic Technology | CMOS | — |
| Logic Elements | 50,528 | — |
| Embedded Memory | 594,432 bits | — |
| User I/O | 450 | — |
| 電源電圧 | 1.2 V | — |
| Package Type | 672-BGA | — |
| Package Designation | FBGA-672 | — |
| ピン数 | 672 | — |
| Ordering Temperature Grade | I8N industrial grade designation | — |
| 実装タイプ | Surface mount BGA | — |
| Configuration Method | [DATA_NEEDED: configuration mode] | — |
| 動作温度範囲 | [DATA_NEEDED: operating temperature range] | — |
| Embedded Multipliers | [DATA_NEEDED: embedded multiplier count] | — |
| Phase-Locked Loops | [DATA_NEEDED: PLL count] | — |
| Global Clock Networks | [DATA_NEEDED: global clock network count] | 16 |
| RoHS ステータス | unknown | — |
| REACH Status | unknown | — |
| Family | — | Cyclone II |
| Logic Elements (LE) | — | 50,528 |
| Embedded Memory Bits | — | 594,432 bits |
| Embedded Memory Blocks | — | 250 M4K blocks (4 Kbit each) |
| Embedded 18x18 Multipliers | — | 86 (150 per device family datasheet figure) |
| User I/O Pins | — | 450 |
| Phase-Locked Loops (PLL) | — | 4 |
| Process Technology | — | 90 nm CMOS with low-k dielectric |
| Core Voltage (VCCINT) | — | 1.2 V |
| I/O Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.0 V / 3.3 V (per bank) |
| パッケージ | — | 672-ball FineLine BGA (FBGA-672) |
| Speed Grade | — | -7 |
| Temperature Grade | — | Commercial (0C to +85C junction) |
| Configuration Modes | — | Passive Serial (PS), Active Serial (AS), JTAG |
| Lead-Free / RoHS | — | Lead-Free / RoHS compliant per Heisener listing |