EP2S130F780C5 vs EP2S130F1020C5N 比較
詳細な並列比較: EP2S130F780C5 メーカー: Intel および EP2S130F1020C5N メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP2S130F780C5 | EP2S130F1020C5N |
|---|---|---|
| ブランド | Intel | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | NRND |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $2,295.00 | $1,320.00 |
| Family | Stratix II | Stratix II |
| Logic Elements | 132,540 | 132,540 |
| Logic Array Blocks (LABs) | 6627 | — |
| User I/O Count | 534 | — |
| Embedded Memory (bits) | 6,737,280 | — |
| Embedded 18x18 Multipliers | 252 | — |
| Process Technology | 90 nm CMOS | 90 nm |
| Core Voltage (VCCINT) | 1.15 V to 1.25 V (typ. 1.2 V) | — |
| Internal Clock Frequency (max) | 609.76 MHz | — |
| Speed Grade | C5 | — |
| 動作温度 | 0 C to +85 C (TJ) | Commercial (0C to +85C, C5 grade) |
| パッケージ | 780-FBGA (FC-FBGA), 29 mm x 29 mm | 1020-ball FC-FBGA (33x33 mm) |
| Lead-Free / RoHS | Lead Free / RoHS Compliant | — |
| Configuration Interface | JTAG (IEEE 1149.1) + Passive Serial / Fast Passive Parallel | — |
| DSP Performance | Up to ~1.4 GMACs (per family datasheet) | — |
| Adaptive Logic Modules (ALMs) | — | 6627 LABs (per Jotrin listing) |
| Total Memory Bits | — | 6,747,840 bits |
| User I/Os | — | 734 |
| Core Supply Voltage (VCCINT) | — | 1.15 V to 1.25 V |
| Maximum Internal Frequency | — | 609.76 MHz |
| 実装タイプ | — | Surface Mount |
| Temperature Grade | — | C5 (other - per Partstack) |
| RoHS ステータス | — | [DATA_NEEDED: rohs status] |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| PLLs | — | 4 (typical Stratix II feature) |
| Global Clock Networks | — | 16 (typical Stratix II feature) |
| Configuration Method | — | Serial/Parallel via Quartus II (typical Stratix II) |
| Country of Origin | — | Republic of Korea (per GlobalSpec) |
| ECCN | — | 3A001.a.7.a (per GlobalSpec) |
| Estimated EOL Date | — | 2023 (per GlobalSpec) |