EP2S15F672C3 vs EP2S15F672C5N 比較
詳細な並列比較: EP2S15F672C3 メーカー: Intel および EP2S15F672C5N メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP2S15F672C3 | EP2S15F672C5N |
|---|---|---|
| ブランド | Intel | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | NRND |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $142.30 | $121.90 |
| Family | Stratix II | Stratix II |
| Logic Elements | 15,600 | 15,600 |
| Embedded Memory (bits) | 419,328 | 419,328 |
| DSP Blocks (18-bit multipliers) | 156 | — |
| Maximum User I/O | 366 | — |
| Core Voltage | 1.2 V | — |
| Process Technology | 90 nm CMOS | — |
| Maximum Internal Frequency | [DATA_NEEDED: max internal clock MHz] | 640 MHz |
| パッケージ | 672-ball FC-FBGA | 672-BBGA / FBGA-672 |
| 実装タイプ | Surface Mount | — |
| Operating Temperature Grade | Commercial (C3 suffix) | — |
| Speed Grade | C3 (third commercial speed bin) | -C5 |
| PLLs | [DATA_NEEDED: number of PLLs] | — |
| Global Clock Networks | [DATA_NEEDED: number of global clocks] | — |
| RoHS ステータス | [DATA_NEEDED: RoHS compliance] | RoHS Compliant |
| MSLレベル | [DATA_NEEDED: moisture sensitivity level] | — |
| Series | — | Altera Stratix II |
| Logic Array Blocks (LABs) | — | 780 |
| Configurable Logic Blocks (CLBs) | — | 6,240 |
| User I/O Pins | — | 366 |
| Package Dimensions | — | 35 x 35 mm |
| Ball Pitch | — | 1.0 mm |
| 動作温度 | — | 0C to +85C (commercial) |
| Lead-Free (Pb-Free) | — | Yes |