EP2S180F1508C4TT vs EP2S180F1508C4 比較
詳細な並列比較: EP2S180F1508C4TT メーカー: Altera および EP2S180F1508C4 メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Altera
EP2S180F1508C4TT - 180K Logic Elements FPGA | Altera | High-Performance Digital Logic
EP2S180F1508C4TT Obsolete
仕様比較
| パラメータ | EP2S180F1508C4TT | EP2S180F1508C4 |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | 有効 |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $0.00 | $0.00 |
| Product Type | Field-Programmable Gate Array (FPGA) | Field Programmable Gate Array (FPGA) |
| Device Family | Stratix II | — |
| Logic Elements | approximately 180,000 | — |
| User I/O | 1,170 pins | — |
| Logic Array Blocks | 8,970 LABs | — |
| パッケージ | 1,508-ball FBGA | — |
| 実装タイプ | Surface Mount | — |
| Temperature Grade | -T | — |
| Configuration Mechanism | [DATA_NEEDED: configuration mechanism] | — |
| Operating Voltage | [DATA_NEEDED: operating voltage] | — |
| Core Voltage | [DATA_NEEDED: core voltage] | — |
| I/O Voltage | [DATA_NEEDED: I/O voltage] | — |
| 動作温度 | [DATA_NEEDED: operating temperature] | [DATA_NEEDED: operating temperature range] |
| Storage Temperature | [DATA_NEEDED: storage temperature] | — |
| Package Dimensions | [DATA_NEEDED: package dimensions] | — |
| Ball Pitch | [DATA_NEEDED: ball pitch] | — |
| Typical Power Dissipation | [DATA_NEEDED: typical power dissipation] | — |
| RoHS ステータス | unknown | [DATA_NEEDED: RoHS status] |
| REACH Status | unknown | — |
| AEC-Q100 Qualification | unknown | — |
| Lead-Free Status | unknown | — |
| Halogen-Free Status | unknown | — |
| Series | — | Stratix II |
| Logic Elements/Cells | — | 179,400 cells |
| Total RAM Bits | — | 9,383,040 bits |
| Number of I/O | — | 1,170 I/O |
| 電源電圧 | — | 1.15 V to 1.25 V |
| Process Technology | — | 90 nm |
| Operating Frequency | — | 711.24 MHz |
| Supplier Device Package | — | 1508-FBGA (40 mm x 40 mm) |
| パッケージ / ケース | — | 1508-BBGA, FCBGA |
| Terminal Count | — | 1,508 terminals |
| Terminal Form | — | Ball |
| Packaging | — | Tray |
| Time@Peak Reflow Temperature-Max | — | 30 s |
| Moisture Sensitivity Level | — | MSL 4 (72 hours) |
| Package Shape | — | Square |
| Configuration Technology | — | SRAM-based FPGA |