EP2S60F484C3 vs EP2S60F484C4 比較
詳細な並列比較: EP2S60F484C3 メーカー: Altera および EP2S60F484C4 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP2S60F484C3 | EP2S60F484C4 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $92.00 | $974.13 |
| Series | Stratix II | — |
| Manufacturer | Altera (now Intel FPGA) | — |
| Logic Elements | 60,440 | — |
| Adaptive Logic Modules (ALMs) | 24,176 | 30,220 |
| LABs/CLBs | 3,022 | — |
| Total RAM Bits | 2,544,192 | — |
| User I/O Count | 334 | — |
| パッケージ | 484-BBGA, FCBGA (FBGA-484) | 484-ball FBGA (FineLine BGA) |
| Package Size | 23 x 23 mm, 1.0 mm pitch | — |
| Core Voltage | 1.2 V | 1.2 V |
| Process Technology | 90 nm CMOS | 90 nm CMOS |
| Speed Grade | C3 | C4 (commercial, moderate speed) |
| 動作温度 | 0C to +85C (commercial) | 0C to +85C (commercial, C-grade) |
| Number of PLLs | 12 (Stratix II typical) | — |
| 実装タイプ | Surface Mount | Surface Mount |
| RoHS ステータス | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status per official datasheet] |
| Total Multipliers | 12 (9-bit embedded multiplier blocks) | — |
| Family | — | Stratix II |
| Logic Elements (LEs) | — | 60,440 |
| Logic Array Blocks (LABs) | — | 3,022 |
| Embedded Memory (bits) | — | 2,544,192 |
| Maximum User I/O | — | 334 |
| User I/O Banks | — | [DATA_NEEDED: number of I/O banks] |
| Maximum Internal Frequency | — | 711.24 MHz (per third-party datasheet listing) |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Configuration Memory | — | SRAM-based, volatile (requires external config device) |