EP2SGX30F780C3N vs EP2SGX30CF780C3N 比較
詳細な並列比較: EP2SGX30F780C3N メーカー: Altera および EP2SGX30CF780C3N メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP2SGX30F780C3N | EP2SGX30CF780C3N |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | ラストバイ | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $210.00 | $195.00 |
| Family | Stratix II GX | — |
| Logic Elements | 33,880 | — |
| Total RAM Bits | 1,369,728 | — |
| User I/O Pins | 361 | — |
| Number of LABs/CLBs | [DATA_NEEDED: LAB count] | — |
| Total Transceivers | Up to 12 | — |
| Max Transceiver Data Rate | 6.375 Gbps | — |
| Process Technology | 90 nm | 90 nm CMOS |
| Core Voltage | 1.2 V | 1.2 V |
| Max Internal Frequency | 816.9 MHz | — |
| 動作温度 | 0C to +85C (Commercial, C3 suffix) | 0C to +85C (commercial) |
| Package Type | 780-ball FC-FBGA (29x29 mm) | 780-BGA (FC-FBGA) |
| 実装タイプ | Surface Mount | Surface Mount |
| I/O Standards Supported | LVDS, LVTTL, LVCMOS, SSTL, HSTL | — |
| Configuration Modes | Passive Serial, Fast Passive Parallel, JTAG, AES-128 | PS, FPP, JTAG |
| RoHS ステータス | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: not stated in retrieved web snippets] |
| Moisture Sensitivity Level | [DATA_NEEDED: MSL level] | — |
| Series | — | Stratix II GX |
| Number of Logic Elements | — | 33,880 |
| Number of CLBs | — | 33,880 |
| Maximum Operating Frequency | — | 717 MHz |
| ピン数 | — | 780 |
| Number of Transceivers | — | [DATA_NEEDED: transceiver count per family datasheet] |
| Embedded Memory | — | TriMatrix (M512/M4K/M-RAM blocks) |
| Total Embedded RAM | — | ~1.4 Mbit |
| DSP Blocks | — | 18-bit x 18-bit dedicated multipliers |
| Number of User I/O | — | [DATA_NEEDED: pin count varies by package; ~600 typical for 780-BGA] |
| Lead-Free | — | [DATA_NEEDED: not stated in retrieved web snippets] |
| Supply Voltage Range | — | [DATA_NEEDED: full VTT/VCCIO not stated in retrieved web snippets] |