EP2SGX30F780C3N vs EP2SGX30DF780C3N 比較
詳細な並列比較: EP2SGX30F780C3N メーカー: Altera および EP2SGX30DF780C3N メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP2SGX30F780C3N | EP2SGX30DF780C3N |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | ラストバイ | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $210.00 | $95.50 |
| Family | Stratix II GX | Stratix II GX |
| Logic Elements | 33,880 | — |
| Total RAM Bits | 1,369,728 | — |
| User I/O Pins | 361 | — |
| Number of LABs/CLBs | [DATA_NEEDED: LAB count] | — |
| Total Transceivers | Up to 12 | — |
| Max Transceiver Data Rate | 6.375 Gbps | — |
| Process Technology | 90 nm | 90 nm CMOS |
| Core Voltage | 1.2 V | 1.2 V |
| Max Internal Frequency | 816.9 MHz | — |
| 動作温度 | 0C to +85C (Commercial, C3 suffix) | -40 C to +85 C |
| Package Type | 780-ball FC-FBGA (29x29 mm) | FC-FBGA (29 x 29 mm, 1.0 mm pitch) |
| 実装タイプ | Surface Mount | Surface Mount |
| I/O Standards Supported | LVDS, LVTTL, LVCMOS, SSTL, HSTL | — |
| Configuration Modes | Passive Serial, Fast Passive Parallel, JTAG, AES-128 | — |
| RoHS ステータス | [DATA_NEEDED: RoHS compliance] | Compliant |
| Moisture Sensitivity Level | [DATA_NEEDED: MSL level] | — |
| Logic Elements (LEs) | — | 33,880 |
| Logic Cells / Blocks | — | 33,880 |
| Embedded Memory Bits | — | 1,369,728 |
| User I/Os | — | 361 |
| LABs / CLBs | — | 1694 |
| Internal Frequency | — | 622 MHz |
| Number of Pins / Balls | — | 780 |
| Logic Family | — | CMOS |