EP2SGX60EF1152I3 vs EP2SGX60EF1152C4N 比較
詳細な並列比較: EP2SGX60EF1152I3 メーカー: Intel および EP2SGX60EF1152C4N メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Intel
EP2SGX60EF1152I3 - 60K LEs Stratix II GX FPGA, 1152-BGA, Industrial | Intel
EP2SGX60EF1152I3 Obsolete仕様比較
| パラメータ | EP2SGX60EF1152I3 | EP2SGX60EF1152C4N |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | ラストバイ |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $365.00 | $1,350.00 |
| Family | Stratix II GX | Stratix II GX FPGA |
| Series | EP2SGX60 | Stratix II GX |
| Logic Elements (LEs) | 60,440 | — |
| Adaptive Logic Modules (ALMs) | 30,220 (estimated from LEs) | — |
| Equivalent Logic Cells (CLBs) | 60,440 | — |
| Embedded Memory (Bits) | 2,544,192 bits (per DigiKey listing for the I4N variant) | — |
| Maximum Internal Frequency | 717 MHz | — |
| Combinational Delay (per CLB) | 2.99 ns | — |
| Multi-Gigabit Transceivers | [DATA_NEEDED: exact count for EP2SGX60] | — |
| Maximum Transceiver Data Rate | 6.375 Gbps (per Stratix II GX family spec) | — |
| Total RAM Bits | 2,544,192 bits | — |
| パッケージ | 1152-ball FBGA, 35 mm x 35 mm, 1 mm pitch | 1152-BBGA (FBGA-1152), 35x35 mm, 1.0 mm pitch |
| Pin/Ball Count | 1152 | — |
| 実装タイプ | Surface Mount (BGA) | Surface Mount |
| 動作温度 | -40C to +100C (Industrial, I3 speed grade) | 0C to +85C (Commercial) |
| Speed Grade | I3 (Industrial) | — |
| Configuration Mode | Enhanced (EPC) - fast parallel via external memory | — |
| Process Technology | 90 nm CMOS | 90 nm CMOS |
| RoHS ステータス | [DATA_NEEDED: not in retrieved snippets] | Compliant (lead-free, MS-034AAR-1) |
| Logic Elements | — | 60,440 |
| LABs / CLBs | — | 3,022 |
| Total Memory Bits | — | 2,544,192 |
| Maximum User I/O | — | 534 |
| Number of I/O Banks | — | 12 |
| High-Speed Transceivers | — | Up to 12 channels |
| Transceiver Data Rate (max) | — | 6.375 Gbps per channel |
| Core Voltage | — | 1.2 V |
| Design Software | — | Altera Quartus II (7.2 - 13.0sp1) |