EP3C5E144A7N vs EP3C5E144I7N 比較
詳細な並列比較: EP3C5E144A7N メーカー: Altera および EP3C5E144I7N メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP3C5E144A7N | EP3C5E144I7N |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | 有効 | 有効 |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $22.80 | $21.40 |
| Series | Cyclone III | — |
| Logic Elements (LE) | 5,136 | 5,136 |
| Total Memory Bits | 423,936 bits (414 Kbits) | — |
| Embedded Memory Blocks | 46 x M9K (9 Kbit each) | — |
| Embedded 18x18 Multipliers | 23 | 23 |
| User I/O Pins | 94 | — |
| Number of I/O Banks | 4 | — |
| Number of PLLs | 4 | — |
| Core Voltage (VCCINT) | 1.2 V | — |
| I/O Bank Voltage (VCCIO) | Per-bank, supports 1.2 V to 3.3 V | — |
| パッケージ | 144-LQFP Exposed Pad (EQFP, 22x22 mm) | 144-pin EQFP (Enhanced QFP) with exposed pad |
| Speed Grade | 7 | — |
| Temperature Grade | Commercial (0C to +85C junction) | — |
| Process Technology | 65 nm low-k dielectric | 60 nm low-k |
| Configuration Modes | AS, PS, JTAG, Fast Passive Parallel | — |
| Design Toolchain | Quartus II / Quartus Prime | — |
| Supported I/O Standards | LVDS, SSTL, LVTTL, PCI, LVCMOS | — |
| 実装タイプ | Surface Mount | Surface Mount |
| RoHS ステータス | Compliant (per DigiKey product page) | Compliant |
| Family | — | Cyclone III |
| Embedded Memory Bits | — | 423,936 |
| PLLs | — | 4 |
| Maximum User I/O Pins | — | 94 |
| Core Voltage | — | 1.2 V |
| Maximum Internal Clock Frequency | — | 437.5 MHz |
| Package Dimensions | — | 20 mm x 20 mm, 0.4 mm pitch |
| 動作温度 | — | -40 °C to +100 °C (industrial) |
| Configuration Interface | — | JTAG (IEEE 1149.1), passive serial, active serial |
| MSLレベル | — | [DATA_NEEDED: MSL level] |