EP3SE110F1152C2NES vs EP3SE110F1152C4 比較
詳細な並列比較: EP3SE110F1152C2NES メーカー: Altera および EP3SE110F1152C4 メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP3SE110F1152C2NES | EP3SE110F1152C4 |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | NRND | ラストバイ |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $1,320.00 | $2,200.00 |
| Family | Stratix III Enhanced (EP3SE110) | Stratix III E |
| Manufacturer | Altera (Intel) | — |
| Process Technology | 65 nm | 65 nm |
| Logic Elements | 107,500 | 107,500 |
| User I/O Pins | 744 | — |
| Core Voltage | 1.1 V | 1.1 V |
| Maximum Operating Frequency | 600 MHz | — |
| パッケージ | FC-FBGA-1152 (Flip-Chip) | — |
| 実装タイプ | Surface Mount | — |
| 動作温度範囲 | [DATA_NEEDED: temperature grade] | — |
| Speed Grade | C2 | — |
| メモリタイプ | Embedded M9K blocks | — |
| DSP Blocks | Yes (variable-precision DSP) | [DATA_NEEDED: 18x18 multiplier count] |
| Transceivers | [DATA_NEEDED: transceiver count] | — |
| Configuration | SRAM-based, volatile | — |
| Programming Interface | JTAG / Passive Serial / Fast Passive Parallel | — |
| Toolchain | Quartus II (Stratix III support) | — |
| RoHS ステータス | Non-Compliant (per Kynix listing) | Compliant |
| Embedded Memory | — | 8,936,448 bits |
| Maximum User I/Os | — | 744 |
| Logic Array Blocks (LABs) | — | [DATA_NEEDED: LAB count] |
| Maximum Performance | — | 450 MHz |
| Package Type | — | 1152-ball FCBGA (Flip-Chip BGA) |
| Operating Temperature Grade | — | Commercial (C4) |
| Configuration Memory | — | SRAM-based (volatile) |
| On-chip Termination | — | Dynamic, programmable |
| I/O Standards Supported | — | LVDS, LVTTL, LVCMOS, HSTL, SSTL |