EP610DI-30 vs EP610DI-30N 比較
詳細な並列比較: EP610DI-30 メーカー: Rochester Electronics および EP610DI-30N メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Rochester Electronics
EP610DI-30 - 16-Macrocell Classic EPLD, 30ns, CERDIP-24 | Rochester Electronics
EP610DI-30 ✓ 生産中
仕様比較
| パラメータ | EP610DI-30 | EP610DI-30N |
|---|---|---|
| ブランド | Rochester Electronics | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | 有効 | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $23.50 | $17.80 |
| Device Type | EPLD (Erasable Programmable Logic Device) | — |
| Family | Classic EP610 | Altera Classic EP610 |
| Macrocells | 16 | 16 |
| Propagation Delay (tPD) | 30 ns | 30 ns |
| Pipelined Data Rate | 100 MHz | — |
| Technology | CMOS | — |
| 電源電圧 | 5 V (single supply) | — |
| パッケージ | CERDIP-24 (windowed, UV-erasable) | CDIP-24 (Ceramic DIP, windowed) |
| 実装タイプ | Through-Hole | Through-hole (DIP) |
| Programmable Elements | EPROM (UV-erasable, windowed) | — |
| 動作温度 | [DATA_NEEDED: operating temperature range] | -40°C to +85°C (industrial) |
| I/O Pins | [DATA_NEEDED: I/O pin count] | — |
| Logic Capacity | [DATA_NEEDED: usable gates / logic capacity] | — |
| RoHS ステータス | unknown | [DATA_NEEDED: RoHS status] |
| Lead-Free | unknown | — |
| Original Manufacturer | Altera (now Intel) | — |
| Current Supplier | Rochester Electronics (authorized continuing source) | — |
| MSLレベル | N/A (through-hole, non-surface-mount) | [DATA_NEEDED: MSL level] |
| Product Type | — | EPLD (Erasable Programmable Logic Device) |
| Usable Gates | — | 300 |
| Maximum Frequency | — | 33.3 MHz (system); 100 MHz (pipelined) |
| Supply Voltage (VCC) | — | 5 V ±5% |
| ピン数 | — | 24 |
| Process Technology | — | CMOS |
| Programming Method | — | UV-erasable (windowed ceramic) |