EP610IPC-25 vs EP610LC-15 比較
詳細な並列比較: EP610IPC-25 メーカー: Intel および EP610LC-15 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP610IPC-25 | EP610LC-15 |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | NRND | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $8.85 | $4.65 |
| Family | Classic EPLD (EP610) | Altera Classic EPLD (EP610) |
| Architecture | PAL-type, CMOS, Erasable | — |
| Propagation Delay (tpd) | 25 ns (max) | 15 ns |
| Supply Voltage (VCC) | 4.75 V to 5.25 V | — |
| Maximum Inputs | 20 | — |
| Maximum I/O Pins | 16 | — |
| Dedicated Outputs | 16 | — |
| Product Terms | 160 | — |
| 動作温度 | 0 °C to +70 °C (Commercial) | 0C to +70C (commercial) [DATA_NEEDED: full temperature grade] |
| パッケージ | 24-pin PDIP (Plastic DIP) | 28-pin PLCC (J-lead, plastic OTP) |
| Technology | CMOS, UV-erasable (windowless in IPC pkg) | — |
| TTL Compatibility | 100% TTL emulation | — |
| 実装タイプ | Through-Hole | Surface Mount |
| MSLレベル | [DATA_NEEDED: MSL level] | [DATA_NEEDED: MSL rating] |
| RoHS ステータス | Non-compliant (contains Pb, PDIP package) | unknown |
| Logic Capacity | Equivalent to ~24 standard 24-pin PALs | — |
| Product Type | — | Classic EPLD (Erasable Programmable Logic Device) |
| Logic Elements / Macrocells | — | 16 macrocells |
| Equivalent Gates | — | 300 gates |
| Counter Frequency (fmax) | — | 83.3 MHz |
| Pipelined Data Rate | — | up to 100 MHz |
| Supply Voltage (Vcc) | — | 5 V (single supply) |
| Process Technology | — | CMOS |
| ピン数 | — | 28 |
| Programming | — | OTP (one-time programmable) |