EP610PC-20 vs EP610PC-35 比較
詳細な並列比較: EP610PC-20 メーカー: Altera および EP610PC-35 メーカー: Rochester Electronics。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP610PC-20 | EP610PC-35 |
|---|---|---|
| ブランド | Altera | Rochester Electronics |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | 有効 |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $47.80 | $16.79 |
| Family | Classic EPLD | Classic EPLD |
| Logic Elements | 16 macrocells | — |
| Usable Gates | 300 | 300 |
| Propagation Delay (tPD) | 20 ns | 37 ns (max, -35 speed grade) |
| Maximum Operating Frequency | 100 MHz (pipelined) | — |
| Supply Voltage (VCC) | 5 V ±10% | 4.75 V to 5.25 V (5 V nominal) |
| ピン数 | 24 | — |
| パッケージ | PDIP-24 | 24-pin PDIP (Plastic DIP, 0.600" wide, through-hole) |
| 動作温度 | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Process Technology | CMOS EPROM | — |
| Programmable Flip-Flops | 16 | — |
| Input Pins | 24 | — |
| Output Pins | 16 | — |
| I/O Compatibility | TTL | — |
| Program/Erase Method | UV (windowed) or OTP | — |
| RoHS ステータス | Non-compliant (legacy PDIP) | [DATA_NEEDED: RoHS status - not confirmed in provided data] |
| Device Type | — | EPLD (Erasable Programmable Logic Device) |
| Macrocells | — | 16 |
| Internal Counter Frequency | — | up to 100 MHz |
| Supply Voltage - Internal | — | 4.75 V to 5.25 V |
| Programmable Type | — | EPLD (UV-erasable window variant: EP610DC; plastic OTP) |
| 実装タイプ | — | Through Hole |
| Supplier Device Package | — | 24-PDIP |
| Logic Family | — | CMOS |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| MSLレベル | — | [DATA_NEEDED: MSL level] |