EP610PC-30 vs EP610PI-30 比較
詳細な並列比較: EP610PC-30 メーカー: Altera および EP610PI-30 メーカー: Rochester Electronics。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP610PC-30 | EP610PI-30 |
|---|---|---|
| ブランド | Altera | Rochester Electronics |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | NRND | ラストバイ |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $27.74 | $9.85 |
| Device Family | Classic EPLD (EP610) | — |
| Macrocells | 16 | — |
| Usable Gates | 300 | 300 gates |
| Propagation Delay (tPD) | 30 ns | 30 ns (PI-30 speed grade) |
| Maximum Pipeline Frequency | 33.3 MHz (typical) / 100 MHz pipelined | — |
| Supply Voltage (VCC) | 5 V (4.75 V to 5.25 V) | 5 V |
| Process Technology | CMOS EPROM | CMOS EEPROM |
| パッケージ | 24-pin PDIP (0.300 inch) | PDIP-24 (Plastic DIP) |
| 実装タイプ | Through-Hole | — |
| Programmability | One-Time Programmable (OTP, no window on plastic PDIP) | — |
| 動作温度 | 0C to +70C (commercial) | [DATA_NEEDED: operating temperature range] |
| Output Drive Current | [DATA_NEEDED: IOH/IOL per datasheet DC characteristics] | — |
| Input Pins (Dedicated) | [DATA_NEEDED: dedicated input count from datasheet pinout] | — |
| I/O Pins | [DATA_NEEDED: bidirectional I/O count from datasheet pinout] | — |
| Programming Tool | Altera A+PLUS / MAX+PLUS II (legacy) | — |
| RoHS ステータス | Not applicable (legacy non-compliant package per distributor listing) | Not Compliant (per distributor data) |
| Lead Free Status | Not applicable | — |
| Current Distributor | Rochester Electronics, LLC (authorized continuing source) | — |
| Family | — | EP610 Classic EPLD |
| Logic Elements / Macrocells | — | 16 macrocells |
| Maximum Frequency (pipelined) | — | 100 MHz |
| ピン数 | — | 24 |
| Number of Global Clocks | — | 2 |
| Number of Dedicated Inputs | — | 4 |
| Number of I/O Pins | — | 10 |
| Programming Technology | — | EEPROM (in-system, 100+ cycles) |
| ECCN | — | EAR99 |
| HTS Code | — | 8542.39.00.01 |