EP610PC-35 vs EP610PC30 比較
詳細な並列比較: EP610PC-35 メーカー: Rochester Electronics および EP610PC30 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP610PC-35 | EP610PC30 |
|---|---|---|
| ブランド | Rochester Electronics | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | 有効 | NRND |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $16.79 | $42.00 |
| Device Type | EPLD (Erasable Programmable Logic Device) | EPLD (Erasable Programmable Logic Device) |
| Family | Classic EPLD | Classic EP610 |
| Macrocells | 16 | 16 |
| Usable Gates | 300 | 300 |
| Propagation Delay (tPD) | 37 ns (max, -35 speed grade) | 30 ns |
| Internal Counter Frequency | up to 100 MHz | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) | 5 V |
| Supply Voltage - Internal | 4.75 V to 5.25 V | — |
| 動作温度 | 0C to +70C (commercial) | [DATA_NEEDED: operating temperature range] |
| Programmable Type | EPLD (UV-erasable window variant: EP610DC; plastic OTP) | — |
| パッケージ | 24-pin PDIP (Plastic DIP, 0.600" wide, through-hole) | PDIP-24 |
| 実装タイプ | Through Hole | Through-Hole |
| Supplier Device Package | 24-PDIP | — |
| Logic Family | CMOS | — |
| RoHS ステータス | [DATA_NEEDED: RoHS status - not confirmed in provided data] | Not applicable (legacy through-hole, contains Pb per historical datasheet) |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| MSLレベル | [DATA_NEEDED: MSL level] | — |
| Maximum Toggle Frequency | — | 33.3 MHz |
| Pipelined Data Rate | — | Up to 100 MHz |
| Technology | — | CMOS |
| Programming | — | EPROM/EEPROM-based, MAX+plus II toolchain |
| Logic Capacity | — | 16 macrocells / 300 gates equivalent |
| Configuration Memory | — | Non-volatile (UV-erasable or OTP variant) |
| Manufacturer (Original) | — | Altera Corporation (now Intel FPGA) |
| Current Distributor | — | Rochester Electronics, LLC |