EP610PC30 vs EP610LI-30 比較
詳細な並列比較: EP610PC30 メーカー: Altera および EP610LI-30 メーカー: Rochester Electronics。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP610PC30 | EP610LI-30 |
|---|---|---|
| ブランド | Altera | Rochester Electronics |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | NRND | 有効 |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $42.00 | $18.50 |
| Device Type | EPLD (Erasable Programmable Logic Device) | — |
| Family | Classic EP610 | Classic EPLD (MAX architecture) |
| Macrocells | 16 | 16 |
| Usable Gates | 300 | — |
| Propagation Delay (tPD) | 30 ns | — |
| Maximum Toggle Frequency | 33.3 MHz | — |
| Pipelined Data Rate | Up to 100 MHz | — |
| Supply Voltage (VCC) | 5 V | 5 V (TTL-compatible I/O) |
| Technology | CMOS | — |
| パッケージ | PDIP-24 | 24-pin Ceramic DIP (windowed, CDIP) |
| 実装タイプ | Through-Hole | — |
| Programming | EPROM/EEPROM-based, MAX+plus II toolchain | — |
| 動作温度 | [DATA_NEEDED: operating temperature range] | -55C to +125C (military/extended) |
| RoHS ステータス | Not applicable (legacy through-hole, contains Pb per historical datasheet) | unknown |
| Logic Capacity | 16 macrocells / 300 gates equivalent | — |
| Configuration Memory | Non-volatile (UV-erasable or OTP variant) | — |
| Manufacturer (Original) | Altera Corporation (now Intel FPGA) | — |
| Current Distributor | Rochester Electronics, LLC | — |
| Product Type | — | EPLD (Erasable Programmable Logic Device) |
| Pin-to-Pin Delay (tPD) | — | 30 ns |
| Maximum Internal Frequency (fMAX) | — | 100 MHz (pipelined) |
| AND Array | — | 24V16 |
| Process Technology | — | CMOS, UV-erasable EPROM cells |
| Output Polarity | — | User-configurable per macrocell |
| Flip-Flop per Cell | — | D / T / J-K configurable |
| Programming Method | — | UV erase + Classic-series PLD programmer |
| Manufacturer | — | Rochester Electronics (originally Altera) |